startup_stm32h723zgtx.s 30 KB

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  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32h723xx.s
  4. * @author MCD Application Team
  5. * @brief STM32H723xx Devices vector table for GCC based toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address
  10. * - Branches to main in the C library (which eventually
  11. * calls main()).
  12. * After Reset the Cortex-M processor is in Thread mode,
  13. * priority is Privileged, and the Stack is set to Main.
  14. ******************************************************************************
  15. * @attention
  16. *
  17. * Copyright (c) 2019 STMicroelectronics.
  18. * All rights reserved.
  19. *
  20. * This software is licensed under terms that can be found in the LICENSE file
  21. * in the root directory of this software component.
  22. * If no LICENSE file comes with this software, it is provided AS-IS.
  23. *
  24. ******************************************************************************
  25. */
  26. .syntax unified
  27. .cpu cortex-m7
  28. .fpu softvfp
  29. .thumb
  30. .global g_pfnVectors
  31. .global Default_Handler
  32. /* start address for the initialization values of the .data section.
  33. defined in linker script */
  34. .word _sidata
  35. /* start address for the .data section. defined in linker script */
  36. .word _sdata
  37. /* end address for the .data section. defined in linker script */
  38. .word _edata
  39. /* start address for the .bss section. defined in linker script */
  40. .word _sbss
  41. /* end address for the .bss section. defined in linker script */
  42. .word _ebss
  43. /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  44. /**
  45. * @brief This is the code that gets called when the processor first
  46. * starts execution following a reset event. Only the absolutely
  47. * necessary set is performed, after which the application
  48. * supplied main() routine is called.
  49. * @param None
  50. * @retval : None
  51. */
  52. .section .text.Reset_Handler
  53. .weak Reset_Handler
  54. .type Reset_Handler, %function
  55. Reset_Handler:
  56. ldr sp, =_estack /* set stack pointer */
  57. /* Call the clock system initialization function.*/
  58. bl SystemInit
  59. /* Copy the data segment initializers from flash to SRAM */
  60. ldr r0, =_sdata
  61. ldr r1, =_edata
  62. ldr r2, =_sidata
  63. movs r3, #0
  64. b LoopCopyDataInit
  65. CopyDataInit:
  66. ldr r4, [r2, r3]
  67. str r4, [r0, r3]
  68. adds r3, r3, #4
  69. LoopCopyDataInit:
  70. adds r4, r0, r3
  71. cmp r4, r1
  72. bcc CopyDataInit
  73. /* Zero fill the bss segment. */
  74. ldr r2, =_sbss
  75. ldr r4, =_ebss
  76. movs r3, #0
  77. b LoopFillZerobss
  78. FillZerobss:
  79. str r3, [r2]
  80. adds r2, r2, #4
  81. LoopFillZerobss:
  82. cmp r2, r4
  83. bcc FillZerobss
  84. /* Call static constructors */
  85. bl __libc_init_array
  86. /* Call the application's entry point.*/
  87. bl main
  88. bx lr
  89. .size Reset_Handler, .-Reset_Handler
  90. /**
  91. * @brief This is the code that gets called when the processor receives an
  92. * unexpected interrupt. This simply enters an infinite loop, preserving
  93. * the system state for examination by a debugger.
  94. * @param None
  95. * @retval None
  96. */
  97. .section .text.Default_Handler,"ax",%progbits
  98. Default_Handler:
  99. Infinite_Loop:
  100. b Infinite_Loop
  101. .size Default_Handler, .-Default_Handler
  102. /******************************************************************************
  103. *
  104. * The minimal vector table for a Cortex M. Note that the proper constructs
  105. * must be placed on this to ensure that it ends up at physical address
  106. * 0x0000.0000.
  107. *
  108. *******************************************************************************/
  109. .section .isr_vector,"a",%progbits
  110. .type g_pfnVectors, %object
  111. .size g_pfnVectors, .-g_pfnVectors
  112. g_pfnVectors:
  113. .word _estack
  114. .word Reset_Handler
  115. .word NMI_Handler
  116. .word HardFault_Handler
  117. .word MemManage_Handler
  118. .word BusFault_Handler
  119. .word UsageFault_Handler
  120. .word 0
  121. .word 0
  122. .word 0
  123. .word 0
  124. .word SVC_Handler
  125. .word DebugMon_Handler
  126. .word 0
  127. .word PendSV_Handler
  128. .word SysTick_Handler
  129. /* External Interrupts */
  130. .word WWDG_IRQHandler /* Window WatchDog */
  131. .word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */
  132. .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
  133. .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
  134. .word FLASH_IRQHandler /* FLASH */
  135. .word RCC_IRQHandler /* RCC */
  136. .word EXTI0_IRQHandler /* EXTI Line0 */
  137. .word EXTI1_IRQHandler /* EXTI Line1 */
  138. .word EXTI2_IRQHandler /* EXTI Line2 */
  139. .word EXTI3_IRQHandler /* EXTI Line3 */
  140. .word EXTI4_IRQHandler /* EXTI Line4 */
  141. .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
  142. .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
  143. .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
  144. .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
  145. .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
  146. .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
  147. .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
  148. .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
  149. .word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */
  150. .word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */
  151. .word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */
  152. .word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */
  153. .word EXTI9_5_IRQHandler /* External Line[9:5]s */
  154. .word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */
  155. .word TIM1_UP_IRQHandler /* TIM1 Update interrupt */
  156. .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */
  157. .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  158. .word TIM2_IRQHandler /* TIM2 */
  159. .word TIM3_IRQHandler /* TIM3 */
  160. .word TIM4_IRQHandler /* TIM4 */
  161. .word I2C1_EV_IRQHandler /* I2C1 Event */
  162. .word I2C1_ER_IRQHandler /* I2C1 Error */
  163. .word I2C2_EV_IRQHandler /* I2C2 Event */
  164. .word I2C2_ER_IRQHandler /* I2C2 Error */
  165. .word SPI1_IRQHandler /* SPI1 */
  166. .word SPI2_IRQHandler /* SPI2 */
  167. .word USART1_IRQHandler /* USART1 */
  168. .word USART2_IRQHandler /* USART2 */
  169. .word USART3_IRQHandler /* USART3 */
  170. .word EXTI15_10_IRQHandler /* External Line[15:10]s */
  171. .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
  172. .word 0 /* Reserved */
  173. .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
  174. .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
  175. .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
  176. .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
  177. .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
  178. .word FMC_IRQHandler /* FMC */
  179. .word SDMMC1_IRQHandler /* SDMMC1 */
  180. .word TIM5_IRQHandler /* TIM5 */
  181. .word SPI3_IRQHandler /* SPI3 */
  182. .word UART4_IRQHandler /* UART4 */
  183. .word UART5_IRQHandler /* UART5 */
  184. .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
  185. .word TIM7_IRQHandler /* TIM7 */
  186. .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
  187. .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
  188. .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
  189. .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
  190. .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
  191. .word ETH_IRQHandler /* Ethernet */
  192. .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
  193. .word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/
  194. .word 0 /* Reserved */
  195. .word 0 /* Reserved */
  196. .word 0 /* Reserved */
  197. .word 0 /* Reserved */
  198. .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
  199. .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
  200. .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
  201. .word USART6_IRQHandler /* USART6 */
  202. .word I2C3_EV_IRQHandler /* I2C3 event */
  203. .word I2C3_ER_IRQHandler /* I2C3 error */
  204. .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
  205. .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
  206. .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
  207. .word OTG_HS_IRQHandler /* USB OTG HS */
  208. .word DCMI_PSSI_IRQHandler /* DCMI, PSSI */
  209. .word 0 /* Reserved */
  210. .word RNG_IRQHandler /* Rng */
  211. .word FPU_IRQHandler /* FPU */
  212. .word UART7_IRQHandler /* UART7 */
  213. .word UART8_IRQHandler /* UART8 */
  214. .word SPI4_IRQHandler /* SPI4 */
  215. .word SPI5_IRQHandler /* SPI5 */
  216. .word SPI6_IRQHandler /* SPI6 */
  217. .word SAI1_IRQHandler /* SAI1 */
  218. .word LTDC_IRQHandler /* LTDC */
  219. .word LTDC_ER_IRQHandler /* LTDC error */
  220. .word DMA2D_IRQHandler /* DMA2D */
  221. .word 0 /* Reserved */
  222. .word OCTOSPI1_IRQHandler /* OCTOSPI1 */
  223. .word LPTIM1_IRQHandler /* LPTIM1 */
  224. .word CEC_IRQHandler /* HDMI_CEC */
  225. .word I2C4_EV_IRQHandler /* I2C4 Event */
  226. .word I2C4_ER_IRQHandler /* I2C4 Error */
  227. .word SPDIF_RX_IRQHandler /* SPDIF_RX */
  228. .word 0 /* Reserved */
  229. .word 0 /* Reserved */
  230. .word 0 /* Reserved */
  231. .word 0 /* Reserved */
  232. .word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */
  233. .word 0 /* Reserved */
  234. .word 0 /* Reserved */
  235. .word 0 /* Reserved */
  236. .word 0 /* Reserved */
  237. .word 0 /* Reserved */
  238. .word 0 /* Reserved */
  239. .word 0 /* Reserved */
  240. .word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */
  241. .word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */
  242. .word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */
  243. .word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */
  244. .word 0 /* Reserved */
  245. .word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */
  246. .word TIM15_IRQHandler /* TIM15 global Interrupt */
  247. .word TIM16_IRQHandler /* TIM16 global Interrupt */
  248. .word TIM17_IRQHandler /* TIM17 global Interrupt */
  249. .word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */
  250. .word MDIOS_IRQHandler /* MDIOS global Interrupt */
  251. .word 0 /* Reserved */
  252. .word MDMA_IRQHandler /* MDMA global Interrupt */
  253. .word 0 /* Reserved */
  254. .word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */
  255. .word HSEM1_IRQHandler /* HSEM1 global Interrupt */
  256. .word 0 /* Reserved */
  257. .word ADC3_IRQHandler /* ADC3 global Interrupt */
  258. .word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */
  259. .word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */
  260. .word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */
  261. .word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */
  262. .word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */
  263. .word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */
  264. .word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */
  265. .word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */
  266. .word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */
  267. .word COMP1_IRQHandler /* COMP1 global Interrupt */
  268. .word LPTIM2_IRQHandler /* LP TIM2 global interrupt */
  269. .word LPTIM3_IRQHandler /* LP TIM3 global interrupt */
  270. .word LPTIM4_IRQHandler /* LP TIM4 global interrupt */
  271. .word LPTIM5_IRQHandler /* LP TIM5 global interrupt */
  272. .word LPUART1_IRQHandler /* LP UART1 interrupt */
  273. .word 0 /* Reserved */
  274. .word CRS_IRQHandler /* Clock Recovery Global Interrupt */
  275. .word ECC_IRQHandler /* ECC diagnostic Global Interrupt */
  276. .word SAI4_IRQHandler /* SAI4 global interrupt */
  277. .word DTS_IRQHandler /* Digital Temperature Sensor interrupt */
  278. .word 0 /* Reserved */
  279. .word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */
  280. .word OCTOSPI2_IRQHandler /* OCTOSPI2 Interrupt */
  281. .word 0 /* Reserved */
  282. .word 0 /* Reserved */
  283. .word FMAC_IRQHandler /* FMAC Interrupt */
  284. .word CORDIC_IRQHandler /* CORDIC Interrupt */
  285. .word UART9_IRQHandler /* UART9 Interrupt */
  286. .word USART10_IRQHandler /* UART10 Interrupt */
  287. .word I2C5_EV_IRQHandler /* I2C5 Event Interrupt */
  288. .word I2C5_ER_IRQHandler /* I2C5 Error Interrupt */
  289. .word FDCAN3_IT0_IRQHandler /* FDCAN3 interrupt line 0 */
  290. .word FDCAN3_IT1_IRQHandler /* FDCAN3 interrupt line 1 */
  291. .word TIM23_IRQHandler /* TIM23 global interrupt */
  292. .word TIM24_IRQHandler /* TIM24 global interrupt */
  293. /*******************************************************************************
  294. *
  295. * Provide weak aliases for each Exception handler to the Default_Handler.
  296. * As they are weak aliases, any function with the same name will override
  297. * this definition.
  298. *
  299. *******************************************************************************/
  300. .weak NMI_Handler
  301. .thumb_set NMI_Handler,Default_Handler
  302. .weak HardFault_Handler
  303. .thumb_set HardFault_Handler,Default_Handler
  304. .weak MemManage_Handler
  305. .thumb_set MemManage_Handler,Default_Handler
  306. .weak BusFault_Handler
  307. .thumb_set BusFault_Handler,Default_Handler
  308. .weak UsageFault_Handler
  309. .thumb_set UsageFault_Handler,Default_Handler
  310. .weak SVC_Handler
  311. .thumb_set SVC_Handler,Default_Handler
  312. .weak DebugMon_Handler
  313. .thumb_set DebugMon_Handler,Default_Handler
  314. .weak PendSV_Handler
  315. .thumb_set PendSV_Handler,Default_Handler
  316. .weak SysTick_Handler
  317. .thumb_set SysTick_Handler,Default_Handler
  318. .weak WWDG_IRQHandler
  319. .thumb_set WWDG_IRQHandler,Default_Handler
  320. .weak PVD_AVD_IRQHandler
  321. .thumb_set PVD_AVD_IRQHandler,Default_Handler
  322. .weak TAMP_STAMP_IRQHandler
  323. .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
  324. .weak RTC_WKUP_IRQHandler
  325. .thumb_set RTC_WKUP_IRQHandler,Default_Handler
  326. .weak FLASH_IRQHandler
  327. .thumb_set FLASH_IRQHandler,Default_Handler
  328. .weak RCC_IRQHandler
  329. .thumb_set RCC_IRQHandler,Default_Handler
  330. .weak EXTI0_IRQHandler
  331. .thumb_set EXTI0_IRQHandler,Default_Handler
  332. .weak EXTI1_IRQHandler
  333. .thumb_set EXTI1_IRQHandler,Default_Handler
  334. .weak EXTI2_IRQHandler
  335. .thumb_set EXTI2_IRQHandler,Default_Handler
  336. .weak EXTI3_IRQHandler
  337. .thumb_set EXTI3_IRQHandler,Default_Handler
  338. .weak EXTI4_IRQHandler
  339. .thumb_set EXTI4_IRQHandler,Default_Handler
  340. .weak DMA1_Stream0_IRQHandler
  341. .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
  342. .weak DMA1_Stream1_IRQHandler
  343. .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
  344. .weak DMA1_Stream2_IRQHandler
  345. .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
  346. .weak DMA1_Stream3_IRQHandler
  347. .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
  348. .weak DMA1_Stream4_IRQHandler
  349. .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
  350. .weak DMA1_Stream5_IRQHandler
  351. .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
  352. .weak DMA1_Stream6_IRQHandler
  353. .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
  354. .weak ADC_IRQHandler
  355. .thumb_set ADC_IRQHandler,Default_Handler
  356. .weak FDCAN1_IT0_IRQHandler
  357. .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
  358. .weak FDCAN2_IT0_IRQHandler
  359. .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
  360. .weak FDCAN1_IT1_IRQHandler
  361. .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
  362. .weak FDCAN2_IT1_IRQHandler
  363. .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
  364. .weak EXTI9_5_IRQHandler
  365. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  366. .weak TIM1_BRK_IRQHandler
  367. .thumb_set TIM1_BRK_IRQHandler,Default_Handler
  368. .weak TIM1_UP_IRQHandler
  369. .thumb_set TIM1_UP_IRQHandler,Default_Handler
  370. .weak TIM1_TRG_COM_IRQHandler
  371. .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
  372. .weak TIM1_CC_IRQHandler
  373. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  374. .weak TIM2_IRQHandler
  375. .thumb_set TIM2_IRQHandler,Default_Handler
  376. .weak TIM3_IRQHandler
  377. .thumb_set TIM3_IRQHandler,Default_Handler
  378. .weak TIM4_IRQHandler
  379. .thumb_set TIM4_IRQHandler,Default_Handler
  380. .weak I2C1_EV_IRQHandler
  381. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  382. .weak I2C1_ER_IRQHandler
  383. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  384. .weak I2C2_EV_IRQHandler
  385. .thumb_set I2C2_EV_IRQHandler,Default_Handler
  386. .weak I2C2_ER_IRQHandler
  387. .thumb_set I2C2_ER_IRQHandler,Default_Handler
  388. .weak SPI1_IRQHandler
  389. .thumb_set SPI1_IRQHandler,Default_Handler
  390. .weak SPI2_IRQHandler
  391. .thumb_set SPI2_IRQHandler,Default_Handler
  392. .weak USART1_IRQHandler
  393. .thumb_set USART1_IRQHandler,Default_Handler
  394. .weak USART2_IRQHandler
  395. .thumb_set USART2_IRQHandler,Default_Handler
  396. .weak USART3_IRQHandler
  397. .thumb_set USART3_IRQHandler,Default_Handler
  398. .weak EXTI15_10_IRQHandler
  399. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  400. .weak RTC_Alarm_IRQHandler
  401. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  402. .weak TIM8_BRK_TIM12_IRQHandler
  403. .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
  404. .weak TIM8_UP_TIM13_IRQHandler
  405. .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
  406. .weak TIM8_TRG_COM_TIM14_IRQHandler
  407. .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
  408. .weak TIM8_CC_IRQHandler
  409. .thumb_set TIM8_CC_IRQHandler,Default_Handler
  410. .weak DMA1_Stream7_IRQHandler
  411. .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
  412. .weak FMC_IRQHandler
  413. .thumb_set FMC_IRQHandler,Default_Handler
  414. .weak SDMMC1_IRQHandler
  415. .thumb_set SDMMC1_IRQHandler,Default_Handler
  416. .weak TIM5_IRQHandler
  417. .thumb_set TIM5_IRQHandler,Default_Handler
  418. .weak SPI3_IRQHandler
  419. .thumb_set SPI3_IRQHandler,Default_Handler
  420. .weak UART4_IRQHandler
  421. .thumb_set UART4_IRQHandler,Default_Handler
  422. .weak UART5_IRQHandler
  423. .thumb_set UART5_IRQHandler,Default_Handler
  424. .weak TIM6_DAC_IRQHandler
  425. .thumb_set TIM6_DAC_IRQHandler,Default_Handler
  426. .weak TIM7_IRQHandler
  427. .thumb_set TIM7_IRQHandler,Default_Handler
  428. .weak DMA2_Stream0_IRQHandler
  429. .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
  430. .weak DMA2_Stream1_IRQHandler
  431. .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
  432. .weak DMA2_Stream2_IRQHandler
  433. .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
  434. .weak DMA2_Stream3_IRQHandler
  435. .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
  436. .weak DMA2_Stream4_IRQHandler
  437. .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
  438. .weak ETH_IRQHandler
  439. .thumb_set ETH_IRQHandler,Default_Handler
  440. .weak ETH_WKUP_IRQHandler
  441. .thumb_set ETH_WKUP_IRQHandler,Default_Handler
  442. .weak FDCAN_CAL_IRQHandler
  443. .thumb_set FDCAN_CAL_IRQHandler,Default_Handler
  444. .weak DMA2_Stream5_IRQHandler
  445. .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
  446. .weak DMA2_Stream6_IRQHandler
  447. .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
  448. .weak DMA2_Stream7_IRQHandler
  449. .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
  450. .weak USART6_IRQHandler
  451. .thumb_set USART6_IRQHandler,Default_Handler
  452. .weak I2C3_EV_IRQHandler
  453. .thumb_set I2C3_EV_IRQHandler,Default_Handler
  454. .weak I2C3_ER_IRQHandler
  455. .thumb_set I2C3_ER_IRQHandler,Default_Handler
  456. .weak OTG_HS_EP1_OUT_IRQHandler
  457. .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
  458. .weak OTG_HS_EP1_IN_IRQHandler
  459. .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
  460. .weak OTG_HS_WKUP_IRQHandler
  461. .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
  462. .weak OTG_HS_IRQHandler
  463. .thumb_set OTG_HS_IRQHandler,Default_Handler
  464. .weak DCMI_PSSI_IRQHandler
  465. .thumb_set DCMI_PSSI_IRQHandler,Default_Handler
  466. .weak RNG_IRQHandler
  467. .thumb_set RNG_IRQHandler,Default_Handler
  468. .weak FPU_IRQHandler
  469. .thumb_set FPU_IRQHandler,Default_Handler
  470. .weak UART7_IRQHandler
  471. .thumb_set UART7_IRQHandler,Default_Handler
  472. .weak UART8_IRQHandler
  473. .thumb_set UART8_IRQHandler,Default_Handler
  474. .weak SPI4_IRQHandler
  475. .thumb_set SPI4_IRQHandler,Default_Handler
  476. .weak SPI5_IRQHandler
  477. .thumb_set SPI5_IRQHandler,Default_Handler
  478. .weak SPI6_IRQHandler
  479. .thumb_set SPI6_IRQHandler,Default_Handler
  480. .weak SAI1_IRQHandler
  481. .thumb_set SAI1_IRQHandler,Default_Handler
  482. .weak LTDC_IRQHandler
  483. .thumb_set LTDC_IRQHandler,Default_Handler
  484. .weak LTDC_ER_IRQHandler
  485. .thumb_set LTDC_ER_IRQHandler,Default_Handler
  486. .weak DMA2D_IRQHandler
  487. .thumb_set DMA2D_IRQHandler,Default_Handler
  488. .weak OCTOSPI1_IRQHandler
  489. .thumb_set OCTOSPI1_IRQHandler,Default_Handler
  490. .weak LPTIM1_IRQHandler
  491. .thumb_set LPTIM1_IRQHandler,Default_Handler
  492. .weak CEC_IRQHandler
  493. .thumb_set CEC_IRQHandler,Default_Handler
  494. .weak I2C4_EV_IRQHandler
  495. .thumb_set I2C4_EV_IRQHandler,Default_Handler
  496. .weak I2C4_ER_IRQHandler
  497. .thumb_set I2C4_ER_IRQHandler,Default_Handler
  498. .weak SPDIF_RX_IRQHandler
  499. .thumb_set SPDIF_RX_IRQHandler,Default_Handler
  500. .weak DMAMUX1_OVR_IRQHandler
  501. .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
  502. .weak DFSDM1_FLT0_IRQHandler
  503. .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
  504. .weak DFSDM1_FLT1_IRQHandler
  505. .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
  506. .weak DFSDM1_FLT2_IRQHandler
  507. .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
  508. .weak DFSDM1_FLT3_IRQHandler
  509. .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
  510. .weak SWPMI1_IRQHandler
  511. .thumb_set SWPMI1_IRQHandler,Default_Handler
  512. .weak TIM15_IRQHandler
  513. .thumb_set TIM15_IRQHandler,Default_Handler
  514. .weak TIM16_IRQHandler
  515. .thumb_set TIM16_IRQHandler,Default_Handler
  516. .weak TIM17_IRQHandler
  517. .thumb_set TIM17_IRQHandler,Default_Handler
  518. .weak MDIOS_WKUP_IRQHandler
  519. .thumb_set MDIOS_WKUP_IRQHandler,Default_Handler
  520. .weak MDIOS_IRQHandler
  521. .thumb_set MDIOS_IRQHandler,Default_Handler
  522. .weak MDMA_IRQHandler
  523. .thumb_set MDMA_IRQHandler,Default_Handler
  524. .weak SDMMC2_IRQHandler
  525. .thumb_set SDMMC2_IRQHandler,Default_Handler
  526. .weak HSEM1_IRQHandler
  527. .thumb_set HSEM1_IRQHandler,Default_Handler
  528. .weak ADC3_IRQHandler
  529. .thumb_set ADC3_IRQHandler,Default_Handler
  530. .weak DMAMUX2_OVR_IRQHandler
  531. .thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler
  532. .weak BDMA_Channel0_IRQHandler
  533. .thumb_set BDMA_Channel0_IRQHandler,Default_Handler
  534. .weak BDMA_Channel1_IRQHandler
  535. .thumb_set BDMA_Channel1_IRQHandler,Default_Handler
  536. .weak BDMA_Channel2_IRQHandler
  537. .thumb_set BDMA_Channel2_IRQHandler,Default_Handler
  538. .weak BDMA_Channel3_IRQHandler
  539. .thumb_set BDMA_Channel3_IRQHandler,Default_Handler
  540. .weak BDMA_Channel4_IRQHandler
  541. .thumb_set BDMA_Channel4_IRQHandler,Default_Handler
  542. .weak BDMA_Channel5_IRQHandler
  543. .thumb_set BDMA_Channel5_IRQHandler,Default_Handler
  544. .weak BDMA_Channel6_IRQHandler
  545. .thumb_set BDMA_Channel6_IRQHandler,Default_Handler
  546. .weak BDMA_Channel7_IRQHandler
  547. .thumb_set BDMA_Channel7_IRQHandler,Default_Handler
  548. .weak COMP1_IRQHandler
  549. .thumb_set COMP1_IRQHandler,Default_Handler
  550. .weak LPTIM2_IRQHandler
  551. .thumb_set LPTIM2_IRQHandler,Default_Handler
  552. .weak LPTIM3_IRQHandler
  553. .thumb_set LPTIM3_IRQHandler,Default_Handler
  554. .weak LPTIM4_IRQHandler
  555. .thumb_set LPTIM4_IRQHandler,Default_Handler
  556. .weak LPTIM5_IRQHandler
  557. .thumb_set LPTIM5_IRQHandler,Default_Handler
  558. .weak LPUART1_IRQHandler
  559. .thumb_set LPUART1_IRQHandler,Default_Handler
  560. .weak CRS_IRQHandler
  561. .thumb_set CRS_IRQHandler,Default_Handler
  562. .weak ECC_IRQHandler
  563. .thumb_set ECC_IRQHandler,Default_Handler
  564. .weak SAI4_IRQHandler
  565. .thumb_set SAI4_IRQHandler,Default_Handler
  566. .weak DTS_IRQHandler
  567. .thumb_set DTS_IRQHandler,Default_Handler
  568. .weak WAKEUP_PIN_IRQHandler
  569. .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler
  570. .weak OCTOSPI2_IRQHandler
  571. .thumb_set OCTOSPI2_IRQHandler,Default_Handler
  572. .weak FMAC_IRQHandler
  573. .thumb_set FMAC_IRQHandler,Default_Handler
  574. .weak CORDIC_IRQHandler
  575. .thumb_set CORDIC_IRQHandler,Default_Handler
  576. .weak UART9_IRQHandler
  577. .thumb_set UART9_IRQHandler,Default_Handler
  578. .weak USART10_IRQHandler
  579. .thumb_set USART10_IRQHandler,Default_Handler
  580. .weak I2C5_EV_IRQHandler
  581. .thumb_set I2C5_EV_IRQHandler,Default_Handler
  582. .weak I2C5_ER_IRQHandler
  583. .thumb_set I2C5_ER_IRQHandler,Default_Handler
  584. .weak FDCAN3_IT0_IRQHandler
  585. .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
  586. .weak FDCAN3_IT1_IRQHandler
  587. .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
  588. .weak TIM23_IRQHandler
  589. .thumb_set TIM23_IRQHandler,Default_Handler
  590. .weak TIM24_IRQHandler
  591. .thumb_set TIM24_IRQHandler,Default_Handler