stm32h7xx_hal_i2c.h 39 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835
  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_i2c.h
  4. * @author MCD Application Team
  5. * @brief Header file of I2C HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32H7xx_HAL_I2C_H
  20. #define STM32H7xx_HAL_I2C_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32h7xx_hal_def.h"
  26. /** @addtogroup STM32H7xx_HAL_Driver
  27. * @{
  28. */
  29. /** @addtogroup I2C
  30. * @{
  31. */
  32. /* Exported types ------------------------------------------------------------*/
  33. /** @defgroup I2C_Exported_Types I2C Exported Types
  34. * @{
  35. */
  36. /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
  37. * @brief I2C Configuration Structure definition
  38. * @{
  39. */
  40. typedef struct
  41. {
  42. uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
  43. This parameter calculated by referring to I2C initialization section
  44. in Reference manual */
  45. uint32_t OwnAddress1; /*!< Specifies the first device own address.
  46. This parameter can be a 7-bit or 10-bit address. */
  47. uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
  48. This parameter can be a value of @ref I2C_ADDRESSING_MODE */
  49. uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
  50. This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
  51. uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
  52. This parameter can be a 7-bit address. */
  53. uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing
  54. mode is selected.
  55. This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
  56. uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
  57. This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
  58. uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
  59. This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
  60. } I2C_InitTypeDef;
  61. /**
  62. * @}
  63. */
  64. /** @defgroup HAL_state_structure_definition HAL state structure definition
  65. * @brief HAL State structure definition
  66. * @note HAL I2C State value coding follow below described bitmap :\n
  67. * b7-b6 Error information\n
  68. * 00 : No Error\n
  69. * 01 : Abort (Abort user request on going)\n
  70. * 10 : Timeout\n
  71. * 11 : Error\n
  72. * b5 Peripheral initialization status\n
  73. * 0 : Reset (peripheral not initialized)\n
  74. * 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n
  75. * b4 (not used)\n
  76. * x : Should be set to 0\n
  77. * b3\n
  78. * 0 : Ready or Busy (No Listen mode ongoing)\n
  79. * 1 : Listen (peripheral in Address Listen Mode)\n
  80. * b2 Intrinsic process state\n
  81. * 0 : Ready\n
  82. * 1 : Busy (peripheral busy with some configuration or internal operations)\n
  83. * b1 Rx state\n
  84. * 0 : Ready (no Rx operation ongoing)\n
  85. * 1 : Busy (Rx operation ongoing)\n
  86. * b0 Tx state\n
  87. * 0 : Ready (no Tx operation ongoing)\n
  88. * 1 : Busy (Tx operation ongoing)
  89. * @{
  90. */
  91. typedef enum
  92. {
  93. HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
  94. HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
  95. HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
  96. HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
  97. HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
  98. HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
  99. HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
  100. process is ongoing */
  101. HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
  102. process is ongoing */
  103. HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
  104. HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
  105. HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
  106. } HAL_I2C_StateTypeDef;
  107. /**
  108. * @}
  109. */
  110. /** @defgroup HAL_mode_structure_definition HAL mode structure definition
  111. * @brief HAL Mode structure definition
  112. * @note HAL I2C Mode value coding follow below described bitmap :\n
  113. * b7 (not used)\n
  114. * x : Should be set to 0\n
  115. * b6\n
  116. * 0 : None\n
  117. * 1 : Memory (HAL I2C communication is in Memory Mode)\n
  118. * b5\n
  119. * 0 : None\n
  120. * 1 : Slave (HAL I2C communication is in Slave Mode)\n
  121. * b4\n
  122. * 0 : None\n
  123. * 1 : Master (HAL I2C communication is in Master Mode)\n
  124. * b3-b2-b1-b0 (not used)\n
  125. * xxxx : Should be set to 0000
  126. * @{
  127. */
  128. typedef enum
  129. {
  130. HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
  131. HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
  132. HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
  133. HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
  134. } HAL_I2C_ModeTypeDef;
  135. /**
  136. * @}
  137. */
  138. /** @defgroup I2C_Error_Code_definition I2C Error Code definition
  139. * @brief I2C Error Code definition
  140. * @{
  141. */
  142. #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
  143. #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
  144. #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
  145. #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */
  146. #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
  147. #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
  148. #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
  149. #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
  150. #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */
  151. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  152. #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */
  153. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  154. #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */
  155. /**
  156. * @}
  157. */
  158. /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
  159. * @brief I2C handle Structure definition
  160. * @{
  161. */
  162. typedef struct __I2C_HandleTypeDef
  163. {
  164. I2C_TypeDef *Instance; /*!< I2C registers base address */
  165. I2C_InitTypeDef Init; /*!< I2C communication parameters */
  166. uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
  167. uint16_t XferSize; /*!< I2C transfer size */
  168. __IO uint16_t XferCount; /*!< I2C transfer counter */
  169. __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
  170. be a value of @ref I2C_XFEROPTIONS */
  171. __IO uint32_t PreviousState; /*!< I2C communication Previous state */
  172. HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
  173. /*!< I2C transfer IRQ handler function pointer */
  174. DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
  175. DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
  176. HAL_LockTypeDef Lock; /*!< I2C locking object */
  177. __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
  178. __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
  179. __IO uint32_t ErrorCode; /*!< I2C Error code */
  180. __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
  181. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  182. void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
  183. /*!< I2C Master Tx Transfer completed callback */
  184. void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
  185. /*!< I2C Master Rx Transfer completed callback */
  186. void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
  187. /*!< I2C Slave Tx Transfer completed callback */
  188. void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
  189. /*!< I2C Slave Rx Transfer completed callback */
  190. void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
  191. /*!< I2C Listen Complete callback */
  192. void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
  193. /*!< I2C Memory Tx Transfer completed callback */
  194. void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
  195. /*!< I2C Memory Rx Transfer completed callback */
  196. void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c);
  197. /*!< I2C Error callback */
  198. void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
  199. /*!< I2C Abort callback */
  200. void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
  201. /*!< I2C Slave Address Match callback */
  202. void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c);
  203. /*!< I2C Msp Init callback */
  204. void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c);
  205. /*!< I2C Msp DeInit callback */
  206. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  207. } I2C_HandleTypeDef;
  208. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  209. /**
  210. * @brief HAL I2C Callback ID enumeration definition
  211. */
  212. typedef enum
  213. {
  214. HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */
  215. HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */
  216. HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */
  217. HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */
  218. HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */
  219. HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */
  220. HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */
  221. HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */
  222. HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */
  223. HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */
  224. HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */
  225. } HAL_I2C_CallbackIDTypeDef;
  226. /**
  227. * @brief HAL I2C Callback pointer definition
  228. */
  229. typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c);
  230. /*!< pointer to an I2C callback function */
  231. typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection,
  232. uint16_t AddrMatchCode);
  233. /*!< pointer to an I2C Address Match callback function */
  234. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  235. /**
  236. * @}
  237. */
  238. /**
  239. * @}
  240. */
  241. /* Exported constants --------------------------------------------------------*/
  242. /** @defgroup I2C_Exported_Constants I2C Exported Constants
  243. * @{
  244. */
  245. /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
  246. * @{
  247. */
  248. #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
  249. #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
  250. #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
  251. #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
  252. #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
  253. #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
  254. /* List of XferOptions in usage of :
  255. * 1- Restart condition in all use cases (direction change or not)
  256. */
  257. #define I2C_OTHER_FRAME (0x000000AAU)
  258. #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
  259. /**
  260. * @}
  261. */
  262. /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
  263. * @{
  264. */
  265. #define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
  266. #define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
  267. /**
  268. * @}
  269. */
  270. /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
  271. * @{
  272. */
  273. #define I2C_DUALADDRESS_DISABLE (0x00000000U)
  274. #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
  275. /**
  276. * @}
  277. */
  278. /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
  279. * @{
  280. */
  281. #define I2C_OA2_NOMASK ((uint8_t)0x00U)
  282. #define I2C_OA2_MASK01 ((uint8_t)0x01U)
  283. #define I2C_OA2_MASK02 ((uint8_t)0x02U)
  284. #define I2C_OA2_MASK03 ((uint8_t)0x03U)
  285. #define I2C_OA2_MASK04 ((uint8_t)0x04U)
  286. #define I2C_OA2_MASK05 ((uint8_t)0x05U)
  287. #define I2C_OA2_MASK06 ((uint8_t)0x06U)
  288. #define I2C_OA2_MASK07 ((uint8_t)0x07U)
  289. /**
  290. * @}
  291. */
  292. /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
  293. * @{
  294. */
  295. #define I2C_GENERALCALL_DISABLE (0x00000000U)
  296. #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
  297. /**
  298. * @}
  299. */
  300. /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
  301. * @{
  302. */
  303. #define I2C_NOSTRETCH_DISABLE (0x00000000U)
  304. #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
  305. /**
  306. * @}
  307. */
  308. /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
  309. * @{
  310. */
  311. #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
  312. #define I2C_MEMADD_SIZE_16BIT (0x00000002U)
  313. /**
  314. * @}
  315. */
  316. /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
  317. * @{
  318. */
  319. #define I2C_DIRECTION_TRANSMIT (0x00000000U)
  320. #define I2C_DIRECTION_RECEIVE (0x00000001U)
  321. /**
  322. * @}
  323. */
  324. /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
  325. * @{
  326. */
  327. #define I2C_RELOAD_MODE I2C_CR2_RELOAD
  328. #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
  329. #define I2C_SOFTEND_MODE (0x00000000U)
  330. /**
  331. * @}
  332. */
  333. /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
  334. * @{
  335. */
  336. #define I2C_NO_STARTSTOP (0x00000000U)
  337. #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
  338. #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
  339. #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
  340. /**
  341. * @}
  342. */
  343. /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
  344. * @brief I2C Interrupt definition
  345. * Elements values convention: 0xXXXXXXXX
  346. * - XXXXXXXX : Interrupt control mask
  347. * @{
  348. */
  349. #define I2C_IT_ERRI I2C_CR1_ERRIE
  350. #define I2C_IT_TCI I2C_CR1_TCIE
  351. #define I2C_IT_STOPI I2C_CR1_STOPIE
  352. #define I2C_IT_NACKI I2C_CR1_NACKIE
  353. #define I2C_IT_ADDRI I2C_CR1_ADDRIE
  354. #define I2C_IT_RXI I2C_CR1_RXIE
  355. #define I2C_IT_TXI I2C_CR1_TXIE
  356. /**
  357. * @}
  358. */
  359. /** @defgroup I2C_Flag_definition I2C Flag definition
  360. * @{
  361. */
  362. #define I2C_FLAG_TXE I2C_ISR_TXE
  363. #define I2C_FLAG_TXIS I2C_ISR_TXIS
  364. #define I2C_FLAG_RXNE I2C_ISR_RXNE
  365. #define I2C_FLAG_ADDR I2C_ISR_ADDR
  366. #define I2C_FLAG_AF I2C_ISR_NACKF
  367. #define I2C_FLAG_STOPF I2C_ISR_STOPF
  368. #define I2C_FLAG_TC I2C_ISR_TC
  369. #define I2C_FLAG_TCR I2C_ISR_TCR
  370. #define I2C_FLAG_BERR I2C_ISR_BERR
  371. #define I2C_FLAG_ARLO I2C_ISR_ARLO
  372. #define I2C_FLAG_OVR I2C_ISR_OVR
  373. #define I2C_FLAG_PECERR I2C_ISR_PECERR
  374. #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
  375. #define I2C_FLAG_ALERT I2C_ISR_ALERT
  376. #define I2C_FLAG_BUSY I2C_ISR_BUSY
  377. #define I2C_FLAG_DIR I2C_ISR_DIR
  378. /**
  379. * @}
  380. */
  381. /**
  382. * @}
  383. */
  384. /* Exported macros -----------------------------------------------------------*/
  385. /** @defgroup I2C_Exported_Macros I2C Exported Macros
  386. * @{
  387. */
  388. /** @brief Reset I2C handle state.
  389. * @param __HANDLE__ specifies the I2C Handle.
  390. * @retval None
  391. */
  392. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  393. #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
  394. (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
  395. (__HANDLE__)->MspInitCallback = NULL; \
  396. (__HANDLE__)->MspDeInitCallback = NULL; \
  397. } while(0)
  398. #else
  399. #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
  400. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  401. /** @brief Enable the specified I2C interrupt.
  402. * @param __HANDLE__ specifies the I2C Handle.
  403. * @param __INTERRUPT__ specifies the interrupt source to enable.
  404. * This parameter can be one of the following values:
  405. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  406. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  407. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  408. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  409. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  410. * @arg @ref I2C_IT_RXI RX interrupt enable
  411. * @arg @ref I2C_IT_TXI TX interrupt enable
  412. *
  413. * @retval None
  414. */
  415. #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
  416. /** @brief Disable the specified I2C interrupt.
  417. * @param __HANDLE__ specifies the I2C Handle.
  418. * @param __INTERRUPT__ specifies the interrupt source to disable.
  419. * This parameter can be one of the following values:
  420. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  421. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  422. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  423. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  424. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  425. * @arg @ref I2C_IT_RXI RX interrupt enable
  426. * @arg @ref I2C_IT_TXI TX interrupt enable
  427. *
  428. * @retval None
  429. */
  430. #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
  431. /** @brief Check whether the specified I2C interrupt source is enabled or not.
  432. * @param __HANDLE__ specifies the I2C Handle.
  433. * @param __INTERRUPT__ specifies the I2C interrupt source to check.
  434. * This parameter can be one of the following values:
  435. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  436. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  437. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  438. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  439. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  440. * @arg @ref I2C_IT_RXI RX interrupt enable
  441. * @arg @ref I2C_IT_TXI TX interrupt enable
  442. *
  443. * @retval The new state of __INTERRUPT__ (SET or RESET).
  444. */
  445. #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \
  446. (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  447. /** @brief Check whether the specified I2C flag is set or not.
  448. * @param __HANDLE__ specifies the I2C Handle.
  449. * @param __FLAG__ specifies the flag to check.
  450. * This parameter can be one of the following values:
  451. * @arg @ref I2C_FLAG_TXE Transmit data register empty
  452. * @arg @ref I2C_FLAG_TXIS Transmit interrupt status
  453. * @arg @ref I2C_FLAG_RXNE Receive data register not empty
  454. * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
  455. * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
  456. * @arg @ref I2C_FLAG_STOPF STOP detection flag
  457. * @arg @ref I2C_FLAG_TC Transfer complete (master mode)
  458. * @arg @ref I2C_FLAG_TCR Transfer complete reload
  459. * @arg @ref I2C_FLAG_BERR Bus error
  460. * @arg @ref I2C_FLAG_ARLO Arbitration lost
  461. * @arg @ref I2C_FLAG_OVR Overrun/Underrun
  462. * @arg @ref I2C_FLAG_PECERR PEC error in reception
  463. * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
  464. * @arg @ref I2C_FLAG_ALERT SMBus alert
  465. * @arg @ref I2C_FLAG_BUSY Bus busy
  466. * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
  467. *
  468. * @retval The new state of __FLAG__ (SET or RESET).
  469. */
  470. #define I2C_FLAG_MASK (0x0001FFFFU)
  471. #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
  472. (__FLAG__)) == (__FLAG__)) ? SET : RESET)
  473. /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
  474. * @param __HANDLE__ specifies the I2C Handle.
  475. * @param __FLAG__ specifies the flag to clear.
  476. * This parameter can be any combination of the following values:
  477. * @arg @ref I2C_FLAG_TXE Transmit data register empty
  478. * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
  479. * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
  480. * @arg @ref I2C_FLAG_STOPF STOP detection flag
  481. * @arg @ref I2C_FLAG_BERR Bus error
  482. * @arg @ref I2C_FLAG_ARLO Arbitration lost
  483. * @arg @ref I2C_FLAG_OVR Overrun/Underrun
  484. * @arg @ref I2C_FLAG_PECERR PEC error in reception
  485. * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
  486. * @arg @ref I2C_FLAG_ALERT SMBus alert
  487. *
  488. * @retval None
  489. */
  490. #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \
  491. ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
  492. ((__HANDLE__)->Instance->ICR = (__FLAG__)))
  493. /** @brief Enable the specified I2C peripheral.
  494. * @param __HANDLE__ specifies the I2C Handle.
  495. * @retval None
  496. */
  497. #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
  498. /** @brief Disable the specified I2C peripheral.
  499. * @param __HANDLE__ specifies the I2C Handle.
  500. * @retval None
  501. */
  502. #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
  503. /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
  504. * @param __HANDLE__ specifies the I2C Handle.
  505. * @retval None
  506. */
  507. #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
  508. /**
  509. * @}
  510. */
  511. /* Include I2C HAL Extended module */
  512. #include "stm32h7xx_hal_i2c_ex.h"
  513. /* Exported functions --------------------------------------------------------*/
  514. /** @addtogroup I2C_Exported_Functions
  515. * @{
  516. */
  517. /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  518. * @{
  519. */
  520. /* Initialization and de-initialization functions******************************/
  521. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
  522. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
  523. void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
  524. void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
  525. /* Callbacks Register/UnRegister functions ***********************************/
  526. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  527. HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID,
  528. pI2C_CallbackTypeDef pCallback);
  529. HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
  530. HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
  531. HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
  532. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  533. /**
  534. * @}
  535. */
  536. /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
  537. * @{
  538. */
  539. /* IO operation functions ****************************************************/
  540. /******* Blocking mode: Polling */
  541. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  542. uint16_t Size, uint32_t Timeout);
  543. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  544. uint16_t Size, uint32_t Timeout);
  545. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
  546. uint32_t Timeout);
  547. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
  548. uint32_t Timeout);
  549. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
  550. uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  551. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
  552. uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  553. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials,
  554. uint32_t Timeout);
  555. /******* Non-Blocking mode: Interrupt */
  556. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  557. uint16_t Size);
  558. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  559. uint16_t Size);
  560. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  561. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  562. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
  563. uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  564. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
  565. uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  566. HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  567. uint16_t Size, uint32_t XferOptions);
  568. HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  569. uint16_t Size, uint32_t XferOptions);
  570. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
  571. uint32_t XferOptions);
  572. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
  573. uint32_t XferOptions);
  574. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
  575. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
  576. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
  577. /******* Non-Blocking mode: DMA */
  578. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  579. uint16_t Size);
  580. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  581. uint16_t Size);
  582. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  583. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  584. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
  585. uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  586. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
  587. uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  588. HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  589. uint16_t Size, uint32_t XferOptions);
  590. HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
  591. uint16_t Size, uint32_t XferOptions);
  592. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
  593. uint32_t XferOptions);
  594. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
  595. uint32_t XferOptions);
  596. /**
  597. * @}
  598. */
  599. /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
  600. * @{
  601. */
  602. /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
  603. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
  604. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
  605. void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
  606. void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
  607. void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
  608. void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
  609. void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
  610. void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
  611. void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
  612. void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
  613. void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
  614. void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
  615. /**
  616. * @}
  617. */
  618. /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  619. * @{
  620. */
  621. /* Peripheral State, Mode and Error functions *********************************/
  622. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
  623. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
  624. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
  625. /**
  626. * @}
  627. */
  628. /**
  629. * @}
  630. */
  631. /* Private constants ---------------------------------------------------------*/
  632. /** @defgroup I2C_Private_Constants I2C Private Constants
  633. * @{
  634. */
  635. /**
  636. * @}
  637. */
  638. /* Private macros ------------------------------------------------------------*/
  639. /** @defgroup I2C_Private_Macro I2C Private Macros
  640. * @{
  641. */
  642. #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
  643. ((MODE) == I2C_ADDRESSINGMODE_10BIT))
  644. #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
  645. ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
  646. #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
  647. ((MASK) == I2C_OA2_MASK01) || \
  648. ((MASK) == I2C_OA2_MASK02) || \
  649. ((MASK) == I2C_OA2_MASK03) || \
  650. ((MASK) == I2C_OA2_MASK04) || \
  651. ((MASK) == I2C_OA2_MASK05) || \
  652. ((MASK) == I2C_OA2_MASK06) || \
  653. ((MASK) == I2C_OA2_MASK07))
  654. #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
  655. ((CALL) == I2C_GENERALCALL_ENABLE))
  656. #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
  657. ((STRETCH) == I2C_NOSTRETCH_ENABLE))
  658. #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
  659. ((SIZE) == I2C_MEMADD_SIZE_16BIT))
  660. #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
  661. ((MODE) == I2C_AUTOEND_MODE) || \
  662. ((MODE) == I2C_SOFTEND_MODE))
  663. #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
  664. ((REQUEST) == I2C_GENERATE_START_READ) || \
  665. ((REQUEST) == I2C_GENERATE_START_WRITE) || \
  666. ((REQUEST) == I2C_NO_STARTSTOP))
  667. #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
  668. ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
  669. ((REQUEST) == I2C_NEXT_FRAME) || \
  670. ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
  671. ((REQUEST) == I2C_LAST_FRAME) || \
  672. ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
  673. IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
  674. #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
  675. ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
  676. #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \
  677. (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \
  678. I2C_CR2_NBYTES | I2C_CR2_RELOAD | \
  679. I2C_CR2_RD_WRN)))
  680. #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \
  681. >> 16U))
  682. #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \
  683. >> 16U))
  684. #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
  685. #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
  686. #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
  687. #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
  688. #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
  689. #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
  690. (uint16_t)(0xFF00U))) >> 8U)))
  691. #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
  692. #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \
  693. (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
  694. (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \
  695. (~I2C_CR2_RD_WRN)) : \
  696. (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
  697. (I2C_CR2_ADD10) | (I2C_CR2_START)) & \
  698. (~I2C_CR2_RD_WRN)))
  699. #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \
  700. ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
  701. #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
  702. /**
  703. * @}
  704. */
  705. /* Private Functions ---------------------------------------------------------*/
  706. /** @defgroup I2C_Private_Functions I2C Private Functions
  707. * @{
  708. */
  709. /* Private functions are defined in stm32h7xx_hal_i2c.c file */
  710. /**
  711. * @}
  712. */
  713. /**
  714. * @}
  715. */
  716. /**
  717. * @}
  718. */
  719. #ifdef __cplusplus
  720. }
  721. #endif
  722. #endif /* STM32H7xx_HAL_I2C_H */