stm32h7xx_hal_tim_ex.h 31 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_tim_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of TIM HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. */
  18. /* Define to prevent recursive inclusion -------------------------------------*/
  19. #ifndef STM32H7xx_HAL_TIM_EX_H
  20. #define STM32H7xx_HAL_TIM_EX_H
  21. #ifdef __cplusplus
  22. extern "C" {
  23. #endif
  24. /* Includes ------------------------------------------------------------------*/
  25. #include "stm32h7xx_hal_def.h"
  26. /** @addtogroup STM32H7xx_HAL_Driver
  27. * @{
  28. */
  29. /** @addtogroup TIMEx
  30. * @{
  31. */
  32. /* Exported types ------------------------------------------------------------*/
  33. /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
  34. * @{
  35. */
  36. /**
  37. * @brief TIM Hall sensor Configuration Structure definition
  38. */
  39. typedef struct
  40. {
  41. uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
  42. This parameter can be a value of @ref TIM_Input_Capture_Polarity */
  43. uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
  44. This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
  45. uint32_t IC1Filter; /*!< Specifies the input capture filter.
  46. This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
  47. uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
  48. This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
  49. } TIM_HallSensor_InitTypeDef;
  50. #if defined(TIM_BREAK_INPUT_SUPPORT)
  51. /**
  52. * @brief TIM Break/Break2 input configuration
  53. */
  54. typedef struct
  55. {
  56. uint32_t Source; /*!< Specifies the source of the timer break input.
  57. This parameter can be a value of @ref TIMEx_Break_Input_Source */
  58. uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
  59. This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
  60. uint32_t Polarity; /*!< Specifies the break input source polarity.
  61. This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
  62. Not relevant when analog watchdog output of the DFSDM1 used as break input source */
  63. } TIMEx_BreakInputConfigTypeDef;
  64. #endif /* TIM_BREAK_INPUT_SUPPORT */
  65. /**
  66. * @}
  67. */
  68. /* End of exported types -----------------------------------------------------*/
  69. /* Exported constants --------------------------------------------------------*/
  70. /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
  71. * @{
  72. */
  73. /** @defgroup TIMEx_Remap TIM Extended Remapping
  74. * @{
  75. */
  76. #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */
  77. #define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 OUT */
  78. #define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 OUT */
  79. #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */
  80. #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) /* !< TIM1_ETR is connected to ADC1 AWD2 */
  81. #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
  82. #define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< TIM1_ETR is connected to ADC3 AWD1 */
  83. #define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC3 AWD2 */
  84. #define TIM_TIM1_ETR_ADC3_AWD3 TIM1_AF1_ETRSEL_3 /* !< TIM1_ETR is connected to ADC3 AWD3 */
  85. #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */
  86. #define TIM_TIM8_ETR_COMP1 TIM8_AF1_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 OUT */
  87. #define TIM_TIM8_ETR_COMP2 TIM8_AF1_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 OUT */
  88. #define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */
  89. #define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_AF1_ETRSEL_2) /* !< TIM8_ETR is connected to ADC2 AWD2 */
  90. #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
  91. #define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1) /* !< TIM8_ETR is connected to ADC3 AWD1 */
  92. #define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC3 AWD2 */
  93. #define TIM_TIM8_ETR_ADC3_AWD3 TIM8_AF1_ETRSEL_3 /* !< TIM8_ETR is connected to ADC3 AWD3 */
  94. #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */
  95. #define TIM_TIM2_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 OUT */
  96. #define TIM_TIM2_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 OUT */
  97. #define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to RCC LSE */
  98. #define TIM_TIM2_ETR_SAI1_FSA TIM2_AF1_ETRSEL_2 /* !< TIM2_ETR is connected to SAI1 FS_A */
  99. #define TIM_TIM2_ETR_SAI1_FSB (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to SAI1 FS_B */
  100. #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */
  101. #define TIM_TIM3_ETR_COMP1 TIM3_AF1_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 OUT */
  102. #define TIM_TIM5_ETR_GPIO 0x00000000U /* !< TIM5_ETR is connected to GPIO */
  103. #define TIM_TIM5_ETR_SAI2_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI2 FS_A */
  104. #define TIM_TIM5_ETR_SAI2_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI2 FS_B */
  105. #define TIM_TIM5_ETR_SAI4_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI4 FS_A */
  106. #define TIM_TIM5_ETR_SAI4_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI4 FS_B */
  107. #define TIM_TIM23_ETR_GPIO 0x00000000U /* !< TIM23_ETR is connected to GPIO */
  108. #define TIM_TIM23_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /* !< TIM23_ETR is connected to COMP1 OUT */
  109. #define TIM_TIM23_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /* !< TIM23_ETR is connected to COMP2 OUT */
  110. #define TIM_TIM24_ETR_GPIO 0x00000000U /* !< TIM24_ETR is connected to GPIO */
  111. #define TIM_TIM24_ETR_SAI4_FSA TIM5_AF1_ETRSEL_0 /* !< TIM24_ETR is connected to SAI4 FS_A */
  112. #define TIM_TIM24_ETR_SAI4_FSB TIM5_AF1_ETRSEL_1 /* !< TIM24_ETR is connected to SAI4 FS_B */
  113. #define TIM_TIM24_ETR_SAI1_FSA (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM24_ETR is connected to SAI1 FS_A */
  114. #define TIM_TIM24_ETR_SAI1_FSB TIM2_AF1_ETRSEL_2 /* !< TIM24_ETR is connected to SAI1 FS_B */
  115. /**
  116. * @}
  117. */
  118. #if defined(TIM_BREAK_INPUT_SUPPORT)
  119. /** @defgroup TIMEx_Break_Input TIM Extended Break input
  120. * @{
  121. */
  122. #define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */
  123. #define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */
  124. /**
  125. * @}
  126. */
  127. /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
  128. * @{
  129. */
  130. #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */
  131. #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */
  132. #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */
  133. #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
  134. /**
  135. * @}
  136. */
  137. /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
  138. * @{
  139. */
  140. #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */
  141. #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */
  142. /**
  143. * @}
  144. */
  145. /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
  146. * @{
  147. */
  148. #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */
  149. #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */
  150. /**
  151. * @}
  152. */
  153. #endif /* TIM_BREAK_INPUT_SUPPORT */
  154. /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection
  155. * @{
  156. */
  157. #define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1_TI1 is connected to GPIO */
  158. #define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM1_TI1 is connected to COMP1 OUT */
  159. #define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8_TI1 is connected to GPIO */
  160. #define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_0 /* !< TIM8_TI1 is connected to COMP2 OUT */
  161. #define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2_TI4 is connected to GPIO */
  162. #define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /* !< TIM2_TI4 is connected to COMP1 OUT */
  163. #define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1 /* !< TIM2_TI4 is connected to COMP2 OUT */
  164. #define TIM_TIM2_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT */
  165. #define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3_TI1 is connected to GPIO */
  166. #define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM3_TI1 is connected to COMP1 OUT */
  167. #define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1 /* !< TIM3_TI1 is connected to COMP2 OUT */
  168. #define TIM_TIM3_TI1_COMP1_COMP2 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM3_TI1 is connected to COMP1 OUT or COMP2 OUT */
  169. #define TIM_TIM5_TI1_GPIO 0x00000000U /* !< TIM5_TI1 is connected to GPIO */
  170. #define TIM_TIM5_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /* !< TIM5_TI1 is connected to CAN TMP */
  171. #define TIM_TIM5_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /* !< TIM5_TI1 is connected to CAN RTP */
  172. #define TIM_TIM12_TI1_GPIO 0x00000000U /* !< TIM12 TI1 is connected to GPIO */
  173. #define TIM_TIM12_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM12 TI1 is connected to SPDIF FS */
  174. #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15_TI1 is connected to GPIO */
  175. #define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0 /* !< TIM15_TI1 is connected to TIM2 CH1 */
  176. #define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1 /* !< TIM15_TI1 is connected to TIM3 CH1 */
  177. #define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to TIM4 CH1 */
  178. #define TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_2) /* !< TIM15_TI1 is connected to RCC LSE */
  179. #define TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to RCC CSI */
  180. #define TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to RCC MCO2 */
  181. #define TIM_TIM15_TI2_GPIO 0x00000000U /* !< TIM15_TI2 is connected to GPIO */
  182. #define TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0) /* !< TIM15_TI2 is connected to TIM2 CH2 */
  183. #define TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM3 CH2 */
  184. #define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM4 CH2 */
  185. #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */
  186. #define TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0 /* !< TIM16 TI1 is connected to RCC LSI */
  187. #define TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1 /* !< TIM16 TI1 is connected to RCC LSE */
  188. #define TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM16 TI1 is connected to WKUP_IT */
  189. #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */
  190. #define TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM17 TI1 is connected to SPDIF FS */
  191. #define TIM_TIM17_TI1_RCC_HSE1MHZ TIM_TISEL_TI1SEL_1 /* !< TIM17 TI1 is connected to RCC HSE 1Mhz */
  192. #define TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM17 TI1 is connected to RCC MCO1 */
  193. #define TIM_TIM23_TI4_GPIO 0x00000000U /* !< TIM23_TI4 is connected to GPIO */
  194. #define TIM_TIM23_TI4_COMP1 TIM_TISEL_TI4SEL_0 /* !< TIM23_TI4 is connected to COMP1 OUT */
  195. #define TIM_TIM23_TI4_COMP2 TIM_TISEL_TI4SEL_1 /* !< TIM23_TI4 is connected to COMP2 OUT */
  196. #define TIM_TIM23_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM23_TI4 is connected to COMP1 OUT or COMP2 OUT */
  197. #define TIM_TIM24_TI1_GPIO 0x00000000U /* !< TIM24_TI1 is connected to GPIO */
  198. #define TIM_TIM24_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /* !< TIM24_TI1 is connected to CAN TMP */
  199. #define TIM_TIM24_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /* !< TIM24_TI1 is connected to CAN RTP */
  200. #define TIM_TIM24_TI1_CAN_SOC (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /* !< TIM24_TI1 is connected to CAN SOC */
  201. /**
  202. * @}
  203. */
  204. /**
  205. * @}
  206. */
  207. /* End of exported constants -------------------------------------------------*/
  208. /* Exported macro ------------------------------------------------------------*/
  209. /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
  210. * @{
  211. */
  212. /**
  213. * @}
  214. */
  215. /* End of exported macro -----------------------------------------------------*/
  216. /* Private macro -------------------------------------------------------------*/
  217. /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
  218. * @{
  219. */
  220. #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \
  221. ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
  222. #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
  223. ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
  224. ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
  225. ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
  226. #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \
  227. ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
  228. #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \
  229. ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
  230. #define IS_TIM_TISEL(__TISEL__) (((__TISEL__) == TIM_TIM1_TI1_GPIO) ||\
  231. ((__TISEL__) == TIM_TIM1_TI1_COMP1) ||\
  232. ((__TISEL__) == TIM_TIM8_TI1_GPIO) ||\
  233. ((__TISEL__) == TIM_TIM8_TI1_COMP2) ||\
  234. ((__TISEL__) == TIM_TIM2_TI4_GPIO) ||\
  235. ((__TISEL__) == TIM_TIM2_TI4_COMP1) ||\
  236. ((__TISEL__) == TIM_TIM2_TI4_COMP2) ||\
  237. ((__TISEL__) == TIM_TIM2_TI4_COMP1_COMP2) ||\
  238. ((__TISEL__) == TIM_TIM3_TI1_GPIO) ||\
  239. ((__TISEL__) == TIM_TIM3_TI1_COMP1) ||\
  240. ((__TISEL__) == TIM_TIM3_TI1_COMP2) ||\
  241. ((__TISEL__) == TIM_TIM3_TI1_COMP1_COMP2) ||\
  242. ((__TISEL__) == TIM_TIM5_TI1_GPIO) ||\
  243. ((__TISEL__) == TIM_TIM5_TI1_CAN_TMP) ||\
  244. ((__TISEL__) == TIM_TIM5_TI1_CAN_RTP) ||\
  245. ((__TISEL__) == TIM_TIM12_TI1_SPDIF_FS) ||\
  246. ((__TISEL__) == TIM_TIM12_TI1_GPIO) ||\
  247. ((__TISEL__) == TIM_TIM15_TI1_GPIO) ||\
  248. ((__TISEL__) == TIM_TIM15_TI1_TIM2_CH1) ||\
  249. ((__TISEL__) == TIM_TIM15_TI1_TIM3_CH1) ||\
  250. ((__TISEL__) == TIM_TIM15_TI1_TIM4_CH1) ||\
  251. ((__TISEL__) == TIM_TIM15_TI1_RCC_LSE) ||\
  252. ((__TISEL__) == TIM_TIM15_TI1_RCC_CSI) ||\
  253. ((__TISEL__) == TIM_TIM15_TI1_RCC_MCO2) ||\
  254. ((__TISEL__) == TIM_TIM15_TI2_GPIO) ||\
  255. ((__TISEL__) == TIM_TIM15_TI2_TIM2_CH2) ||\
  256. ((__TISEL__) == TIM_TIM15_TI2_TIM3_CH2) ||\
  257. ((__TISEL__) == TIM_TIM15_TI2_TIM4_CH2) ||\
  258. ((__TISEL__) == TIM_TIM16_TI1_GPIO) ||\
  259. ((__TISEL__) == TIM_TIM16_TI1_RCC_LSI) ||\
  260. ((__TISEL__) == TIM_TIM16_TI1_RCC_LSE) ||\
  261. ((__TISEL__) == TIM_TIM16_TI1_WKUP_IT) ||\
  262. ((__TISEL__) == TIM_TIM17_TI1_GPIO) ||\
  263. ((__TISEL__) == TIM_TIM17_TI1_SPDIF_FS) ||\
  264. ((__TISEL__) == TIM_TIM17_TI1_RCC_HSE1MHZ) ||\
  265. ((__TISEL__) == TIM_TIM17_TI1_RCC_MCO1) ||\
  266. ((__TISEL__) == TIM_TIM23_TI4_GPIO) ||\
  267. ((__TISEL__) == TIM_TIM23_TI4_COMP1) ||\
  268. ((__TISEL__) == TIM_TIM23_TI4_COMP2) ||\
  269. ((__TISEL__) == TIM_TIM23_TI4_COMP1_COMP2) ||\
  270. ((__TISEL__) == TIM_TIM24_TI1_GPIO) ||\
  271. ((__TISEL__) == TIM_TIM24_TI1_CAN_TMP) ||\
  272. ((__TISEL__) == TIM_TIM24_TI1_CAN_RTP) ||\
  273. ((__TISEL__) == TIM_TIM24_TI1_CAN_SOC))
  274. #define IS_TIM_REMAP(__RREMAP__) (((__RREMAP__) == TIM_TIM1_ETR_GPIO) ||\
  275. ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD1) ||\
  276. ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD2) ||\
  277. ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD3) ||\
  278. ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD1) ||\
  279. ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD2) ||\
  280. ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD3) ||\
  281. ((__RREMAP__) == TIM_TIM1_ETR_COMP1) ||\
  282. ((__RREMAP__) == TIM_TIM1_ETR_COMP2) ||\
  283. ((__RREMAP__) == TIM_TIM8_ETR_GPIO) ||\
  284. ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD1) ||\
  285. ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD2) ||\
  286. ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD3) ||\
  287. ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD1) ||\
  288. ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD2) ||\
  289. ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD3) ||\
  290. ((__RREMAP__) == TIM_TIM8_ETR_COMP1) ||\
  291. ((__RREMAP__) == TIM_TIM8_ETR_COMP2) ||\
  292. ((__RREMAP__) == TIM_TIM2_ETR_GPIO) ||\
  293. ((__RREMAP__) == TIM_TIM2_ETR_COMP1) ||\
  294. ((__RREMAP__) == TIM_TIM2_ETR_COMP2) ||\
  295. ((__RREMAP__) == TIM_TIM2_ETR_RCC_LSE) ||\
  296. ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSA) ||\
  297. ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSB) ||\
  298. ((__RREMAP__) == TIM_TIM3_ETR_GPIO) ||\
  299. ((__RREMAP__) == TIM_TIM3_ETR_COMP1) ||\
  300. ((__RREMAP__) == TIM_TIM5_ETR_GPIO) ||\
  301. ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSA) ||\
  302. ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSB) ||\
  303. ((__RREMAP__) == TIM_TIM23_ETR_GPIO) ||\
  304. ((__RREMAP__) == TIM_TIM23_ETR_COMP1) ||\
  305. ((__RREMAP__) == TIM_TIM23_ETR_COMP2) ||\
  306. ((__RREMAP__) == TIM_TIM24_ETR_GPIO) ||\
  307. ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSA) ||\
  308. ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSB) ||\
  309. ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSA) ||\
  310. ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSB))
  311. /**
  312. * @}
  313. */
  314. /* End of private macro ------------------------------------------------------*/
  315. /* Exported functions --------------------------------------------------------*/
  316. /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
  317. * @{
  318. */
  319. /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  320. * @brief Timer Hall Sensor functions
  321. * @{
  322. */
  323. /* Timer Hall Sensor functions **********************************************/
  324. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig);
  325. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
  326. void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
  327. void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
  328. /* Blocking mode: Polling */
  329. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
  330. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
  331. /* Non-Blocking mode: Interrupt */
  332. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
  333. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
  334. /* Non-Blocking mode: DMA */
  335. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
  336. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
  337. /**
  338. * @}
  339. */
  340. /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  341. * @brief Timer Complementary Output Compare functions
  342. * @{
  343. */
  344. /* Timer Complementary Output Compare functions *****************************/
  345. /* Blocking mode: Polling */
  346. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
  347. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
  348. /* Non-Blocking mode: Interrupt */
  349. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
  350. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
  351. /* Non-Blocking mode: DMA */
  352. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
  353. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
  354. /**
  355. * @}
  356. */
  357. /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  358. * @brief Timer Complementary PWM functions
  359. * @{
  360. */
  361. /* Timer Complementary PWM functions ****************************************/
  362. /* Blocking mode: Polling */
  363. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
  364. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
  365. /* Non-Blocking mode: Interrupt */
  366. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
  367. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
  368. /* Non-Blocking mode: DMA */
  369. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
  370. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
  371. /**
  372. * @}
  373. */
  374. /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  375. * @brief Timer Complementary One Pulse functions
  376. * @{
  377. */
  378. /* Timer Complementary One Pulse functions **********************************/
  379. /* Blocking mode: Polling */
  380. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
  381. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
  382. /* Non-Blocking mode: Interrupt */
  383. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
  384. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
  385. /**
  386. * @}
  387. */
  388. /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  389. * @brief Peripheral Control functions
  390. * @{
  391. */
  392. /* Extended Control functions ************************************************/
  393. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  394. uint32_t CommutationSource);
  395. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  396. uint32_t CommutationSource);
  397. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  398. uint32_t CommutationSource);
  399. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  400. TIM_MasterConfigTypeDef *sMasterConfig);
  401. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  402. TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
  403. #if defined(TIM_BREAK_INPUT_SUPPORT)
  404. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
  405. TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
  406. #endif /* TIM_BREAK_INPUT_SUPPORT */
  407. HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
  408. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
  409. HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);
  410. #if defined(TIM_BDTR_BKBID)
  411. HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
  412. HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
  413. #endif /* TIM_BDTR_BKBID */
  414. /**
  415. * @}
  416. */
  417. /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  418. * @brief Extended Callbacks functions
  419. * @{
  420. */
  421. /* Extended Callback **********************************************************/
  422. void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
  423. void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
  424. void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
  425. void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
  426. /**
  427. * @}
  428. */
  429. /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  430. * @brief Extended Peripheral State functions
  431. * @{
  432. */
  433. /* Extended Peripheral State functions ***************************************/
  434. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
  435. HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN);
  436. /**
  437. * @}
  438. */
  439. /**
  440. * @}
  441. */
  442. /* End of exported functions -------------------------------------------------*/
  443. /* Private functions----------------------------------------------------------*/
  444. /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions
  445. * @{
  446. */
  447. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
  448. void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
  449. /**
  450. * @}
  451. */
  452. /* End of private functions --------------------------------------------------*/
  453. /**
  454. * @}
  455. */
  456. /**
  457. * @}
  458. */
  459. #ifdef __cplusplus
  460. }
  461. #endif
  462. #endif /* STM32H7xx_HAL_TIM_EX_H */