#ifndef UART_APP_H #define UART_APP_H #include "driver/uart_register.h" #include "eagle_soc.h" #include "c_types.h" #include "ets_sys.h" #include "osapi.h" #include #define RX_BUFF_SIZE 0x100 #define TX_BUFF_SIZE 100 #define UART_HW_RTS 0 #define UART_HW_CTS 0 #define UART0 0 #define UART1 1 typedef enum { FIVE_BITS = 0x0, SIX_BITS = 0x1, SEVEN_BITS = 0x2, EIGHT_BITS = 0x3 } UartBitsNum4Char; typedef enum { ONE_STOP_BIT = 0, ONE_HALF_STOP_BIT = BIT2, TWO_STOP_BIT = BIT2 } UartStopBitsNum; typedef enum { NONE_BITS = 0, ODD_BITS = 0, EVEN_BITS = BIT4 } UartParityMode; typedef enum { STICK_PARITY_DIS = 0, STICK_PARITY_EN = BIT3 | BIT5 } UartExistParity; typedef enum { BIT_RATE_9600 = 9600, BIT_RATE_19200 = 19200, BIT_RATE_38400 = 38400, BIT_RATE_57600 = 57600, BIT_RATE_74880 = 74880, BIT_RATE_115200 = 115200, BIT_RATE_230400 = 230400, BIT_RATE_460800 = 460800, BIT_RATE_921600 = 921600 } UartBautRate; typedef enum { NONE_CTRL, HARDWARE_CTRL, XON_XOFF_CTRL } UartFlowCtrl; typedef enum { EMPTY, UNDER_WRITE, WRITE_OVER } RcvMsgBuffState; typedef struct { uint32 RcvBuffSize; uint8 *pRcvMsgBuff; uint8 *pWritePos; uint8 *pReadPos; uint8 TrigLvl; //JLU: may need to pad RcvMsgBuffState BuffState; } RcvMsgBuff; typedef struct { uint32 TrxBuffSize; uint8 *pTrxBuff; } TrxMsgBuff; typedef enum { BAUD_RATE_DET, WAIT_SYNC_FRM, SRCH_MSG_HEAD, RCV_MSG_BODY, RCV_ESC_CHAR, } RcvMsgState; typedef struct { UartBautRate baut_rate; UartBitsNum4Char data_bits; UartExistParity exist_parity; UartParityMode parity; // chip size in byte UartStopBitsNum stop_bits; UartFlowCtrl flow_ctrl; RcvMsgBuff rcv_buff; TrxMsgBuff trx_buff; RcvMsgState rcv_state; int received; int buff_uart_no; //indicate which uart use tx/rx buffer } UartDevice; #define DISABLE_UART1 0 #define ENABLE_UART1 1 void uart_init(UartBautRate uart0_br, UartBautRate uart1_br, bool enable_uart1); int uart0_rx_one_char(); void uart0_send(const char *buf); #define uart0_sendStr uart0_send #endif