cc1200_protocol.h 4.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153
  1. /*
  2. * CC120X_protocol.h
  3. *
  4. * Created on: Apr 13, 2019
  5. * Author: curiousmuch
  6. */
  7. #include <stdio.h>
  8. #include <stdint.h>
  9. #include "cc1200.h"
  10. //*********************************//
  11. // IMPORTANT GPIO SIGNALS
  12. // REG DESCRIPTION
  13. // 0x1e TX CLK
  14. // 0x1d RX_CLK
  15. // 0x10 Carrier Sense Valid
  16. // 0x11 Carrier Sense
  17. //********************************//
  18. // Arrow - AX25 BELL202 AFSK Settings
  19. // -----------------------------------
  20. // Address Config = No address check
  21. // Bit Rate = 1.2
  22. // Carrier Frequency = 144.389954
  23. // Deviation = 4.997253
  24. // Device Address = 0
  25. // Manchester Enable = false
  26. // Modulation Format = 2-FSK
  27. // Packet Bit Length = 0
  28. // Packet Length = 255
  29. // Packet Length Mode = Variable
  30. // RX Filter BW = 14.880952
  31. // Symbol rate = 1.2
  32. // Whitening = false
  33. static const cc1200_reg_settings_t AX25_SETTINGS[]=
  34. {
  35. {CC120X_IOCFG2, 0x09}, // Serial RX Data
  36. {CC120X_IOCFG3, 29}, // Serial Clock
  37. {CC120X_IOCFG0, 0x09}, // Serial RX/TX (Don't Touch)
  38. {CC120X_SYNC_CFG1, 0x00}, // Disable Sync Word
  39. {CC120X_DEVIATION_M, 0x68}, // Deviation: 2.5kHz
  40. {CC120X_MODCFG_DEV_E, 0x00},
  41. {CC120X_DCFILT_CFG, 0x5D},
  42. {CC120X_PREAMBLE_CFG1, 0x00},
  43. {CC120X_PREAMBLE_CFG0, 0x00}, // Preamble Disabled
  44. {CC120X_IQIC, 0xCB},
  45. {CC120X_CHAN_BW, 0xAA},//0x9C},
  46. {CC120X_MDMCFG1, 0x06},
  47. {CC120X_MDMCFG0, 0x45},
  48. {CC120X_SYMBOL_RATE2, 0x3F},
  49. {CC120X_SYMBOL_RATE1, 0x75},
  50. {CC120X_SYMBOL_RATE0, 0x10},
  51. {CC120X_AGC_REF, 0x30},
  52. {CC120X_AGC_CS_THR, 0xEC},
  53. {CC120X_AGC_CFG3, 0x11},
  54. {CC120X_AGC_CFG1, 0x51},
  55. {CC120X_AGC_CFG0, 0x87},
  56. {CC120X_FIFO_CFG, 0x00},
  57. {CC120X_FS_CFG, 0x1B},
  58. {CC120X_PKT_CFG2, 0x03},
  59. {CC120X_PKT_CFG1, 0x00},
  60. {CC120X_PKT_CFG0, 0x28},
  61. {CC120X_PA_CFG1, 0x3F},
  62. {CC120X_PKT_LEN, 0xFF},
  63. {CC120X_IF_MIX_CFG, 0x1C},
  64. {CC120X_FREQOFF_CFG, 0x22}, // Frequency Offset Configuration, Enabled: 0x22, Disabled: 0x02
  65. {CC120X_MDMCFG2, 0x0D}, // CFM, Enabled: 0x0D, Disabled 0x0C
  66. {CC120X_FREQ2, 0x56},
  67. {CC120X_FREQ1, 0xA2},
  68. {CC120X_FREQ0, 0x4C},
  69. {CC120X_IF_ADC1, 0xEE},
  70. {CC120X_IF_ADC0, 0x10},
  71. {CC120X_FS_DIG1, 0x07},
  72. {CC120X_FS_DIG0, 0xAF},
  73. {CC120X_FS_CAL1, 0x40},
  74. {CC120X_FS_CAL0, 0x0E},
  75. {CC120X_FS_DIVTWO, 0x03},
  76. {CC120X_FS_DSM0, 0x33},
  77. {CC120X_FS_DVC0, 0x17},
  78. {CC120X_FS_PFD, 0x00},
  79. {CC120X_FS_PRE, 0x6E},
  80. {CC120X_FS_REG_DIV_CML, 0x1C},
  81. {CC120X_FS_SPARE, 0xAC},
  82. {CC120X_FS_VCO0, 0xB5},
  83. {CC120X_XOSC5, 0x0E},
  84. {CC120X_XOSC1, 0x03},
  85. {CC120X_SERIAL_STATUS, 0x08},
  86. };
  87. // Arrow - FSK Narrowband Settings
  88. // Address Config = No address check
  89. // Bit Rate = 1.2
  90. // Carrier Frequency = 144.389954
  91. // Deviation = 3.986359
  92. // Device Address = 0
  93. // Manchester Enable = false
  94. // Modulation Format = 2-FSK
  95. // Packet Bit Length = 0
  96. // Packet Length = 255
  97. // Packet Length Mode = Variable
  98. // RX Filter BW = 10.964912
  99. // Symbol rate = 1.2
  100. // Whitening = true
  101. static const cc1200_reg_settings_t NARROWBAND_SETTINGS[]=
  102. {
  103. {CC120X_IOCFG2, 0x06},
  104. {CC120X_DEVIATION_M, 0xD1},
  105. {CC120X_MODCFG_DEV_E, 0x00},
  106. {CC120X_DCFILT_CFG, 0x5D},
  107. {CC120X_PREAMBLE_CFG0, 0x8A},
  108. {CC120X_IQIC, 0xCB},
  109. {CC120X_CHAN_BW, 0xA6},
  110. {CC120X_MDMCFG1, 0x40},
  111. {CC120X_MDMCFG0, 0x05},
  112. {CC120X_SYMBOL_RATE2, 0x3F},
  113. {CC120X_SYMBOL_RATE1, 0x75},
  114. {CC120X_SYMBOL_RATE0, 0x10},
  115. {CC120X_AGC_REF, 0x20},
  116. {CC120X_AGC_CS_THR, 0xEC},
  117. {CC120X_AGC_CFG1, 0x51},
  118. {CC120X_AGC_CFG0, 0x87},
  119. {CC120X_FIFO_CFG, 0x00},
  120. {CC120X_FS_CFG, 0x1B},
  121. {CC120X_PKT_CFG2, 0x00},
  122. {CC120X_PKT_CFG1, 0x43},
  123. {CC120X_PKT_CFG0, 0x20},
  124. {CC120X_PKT_LEN, 0xFF},
  125. {CC120X_IF_MIX_CFG, 0x1C},
  126. {CC120X_FREQOFF_CFG, 0x22},
  127. {CC120X_MDMCFG2, 0x0C},
  128. {CC120X_FREQ2, 0x56},
  129. {CC120X_FREQ1, 0xA2},
  130. {CC120X_FREQ0, 0x4C},
  131. {CC120X_IF_ADC1, 0xEE},
  132. {CC120X_IF_ADC0, 0x10},
  133. {CC120X_FS_DIG1, 0x07},
  134. {CC120X_FS_DIG0, 0xAF},
  135. {CC120X_FS_CAL1, 0x40},
  136. {CC120X_FS_CAL0, 0x0E},
  137. {CC120X_FS_DIVTWO, 0x03},
  138. {CC120X_FS_DSM0, 0x33},
  139. {CC120X_FS_DVC0, 0x17},
  140. {CC120X_FS_PFD, 0x00},
  141. {CC120X_FS_PRE, 0x6E},
  142. {CC120X_FS_REG_DIV_CML, 0x1C},
  143. {CC120X_FS_SPARE, 0xAC},
  144. {CC120X_FS_VCO0, 0xB5},
  145. {CC120X_XOSC5, 0x0E},
  146. {CC120X_XOSC1, 0x03},
  147. };