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Initial commit.

curiousmuch 9 months ago
commit
1d772e3e06
100 changed files with 7393 additions and 0 deletions
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+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1512566863" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.412434415" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="USB_DEVICE"/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.438313889">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.438313889" moduleId="org.eclipse.cdt.core.settings" name="Release">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.438313889" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
+					<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.438313889." name="/" resourcePath="">
+						<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.879021302" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release">
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.615817484" name="MCU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32H723ZGTx" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.216602607" name="CPU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.2118683054" name="Core" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.474839555" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv5-d16" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1435403785" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1746200246" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="NUCLEO-H723ZG" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1638039810" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || NUCLEO-H723ZG || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../USB_DEVICE/Target | ../Drivers/CMSIS/Include | ../Core/Inc | ../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc | ../USB_DEVICE/App | ../Drivers/STM32H7xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32H7xx/Include | ../Middlewares/ST/STM32_USB_Device_Library/Core/Inc | ../Drivers/STM32H7xx_HAL_Driver/Inc ||  ||  || USE_HAL_DRIVER | STM32H723xx | USE_FULL_LL_DRIVER ||  || Drivers | Core/Startup | Middlewares | Core | USB_DEVICE ||  ||  || ${workspace_loc:/${ProjName}/STM32H723ZGTX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None || " valueType="string"/>
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1322679626" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
+							<builder buildPath="${workspace_loc:/cc1200_spi_ripper}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.877639067" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.860024821" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1067024708" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.537842960" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.335278154" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.816496120" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1960142345" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1607948746" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
+									<listOptionValue builtIn="false" value="STM32H723xx"/>
+									<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.636273780" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
+									<listOptionValue builtIn="false" value="../Core/Inc"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32H7xx_HAL_Driver/Inc"/>
+									<listOptionValue builtIn="false" value="../Drivers/STM32H7xx_HAL_Driver/Inc/Legacy"/>
+									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32H7xx/Include"/>
+									<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
+									<listOptionValue builtIn="false" value="../USB_DEVICE/App"/>
+									<listOptionValue builtIn="false" value="../USB_DEVICE/Target"/>
+									<listOptionValue builtIn="false" value="../Middlewares/ST/STM32_USB_Device_Library/Core/Inc"/>
+									<listOptionValue builtIn="false" value="../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc"/>
+								</option>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.765122967" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1039247020" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.1488160398" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g0" valueType="enumerated"/>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.834156543" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1145973538" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1781338573" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32H723ZGTX_FLASH.ld}" valueType="string"/>
+								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.1318893307" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.690504664" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.364503648" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1420793457" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.375320722" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1261546836" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1803653206" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1467870153" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.2050460247" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
+							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.240568103" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="USB_DEVICE"/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="cc1200_spi_ripper.null.1387318886" name="cc1200_spi_ripper"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1974938380;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1974938380.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.245229430;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1591753562">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.438313889;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.438313889.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.335278154;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.765122967">
+			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="refreshScope"/>
+</cproject>

File diff suppressed because it is too large
+ 1 - 0
.mxproject


+ 32 - 0
.project

@@ -0,0 +1,32 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>cc1200_spi_ripper</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
+		<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+</projectDescription>

+ 27 - 0
.settings/language.settings.xml

@@ -0,0 +1,27 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1974938380" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1608390479133630628" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.438313889" name="Release">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1608390479133630628" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>

+ 5 - 0
.settings/stm32cubeide.project.prefs

@@ -0,0 +1,5 @@
+635E684B79701B039C64EA45C3F84D30=E79B29660BF25AAA08CC42C193A6DCB8
+66BE74F758C12D739921AEA421D593D3=22
+8DF89ED150041C4CBC7CB9A9CAA90856=CF413FD34CA21A49F240CC64489BD533
+DC22A860405A8BF2F2C095E5B6529F12=CF413FD34CA21A49F240CC64489BD533
+eclipse.preferences.version=1

+ 306 - 0
Core/Inc/cc1200.h

@@ -0,0 +1,306 @@
+/*
+ * cc1200.h
+ *
+ *  Created on: Feb 5, 2022
+ *      Author: curiousmuch
+ */
+
+#ifndef INC_CC1200_H_
+#define INC_CC1200_H_
+
+#include <stdio.h>
+#include <stdint.h>
+
+/* configuration registers */
+#define CC120X_IOCFG3                   0x0000
+#define CC120X_IOCFG2                   0x0001
+#define CC120X_IOCFG1                   0x0002
+#define CC120X_IOCFG0                   0x0003
+#define CC120X_SYNC3                    0x0004
+#define CC120X_SYNC2                    0x0005
+#define CC120X_SYNC1                    0x0006
+#define CC120X_SYNC0                    0x0007
+#define CC120X_SYNC_CFG1                0x0008
+#define CC120X_SYNC_CFG0                0x0009
+#define CC120X_DEVIATION_M              0x000A
+#define CC120X_MODCFG_DEV_E             0x000B
+#define CC120X_DCFILT_CFG               0x000C
+#define CC120X_PREAMBLE_CFG1            0x000D
+#define CC120X_PREAMBLE_CFG0            0x000E
+#define CC120X_IQIC                     0x000F
+#define CC120X_CHAN_BW                  0x0010
+#define CC120X_MDMCFG1                  0x0011
+#define CC120X_MDMCFG0                  0x0012
+#define CC120X_SYMBOL_RATE2             0x0013
+#define CC120X_SYMBOL_RATE1             0x0014
+#define CC120X_SYMBOL_RATE0             0x0015
+#define CC120X_AGC_REF                  0x0016
+#define CC120X_AGC_CS_THR               0x0017
+#define CC120X_AGC_GAIN_ADJUST          0x0018
+#define CC120X_AGC_CFG3                 0x0019
+#define CC120X_AGC_CFG2                 0x001A
+#define CC120X_AGC_CFG1                 0x001B
+#define CC120X_AGC_CFG0                 0x001C
+#define CC120X_FIFO_CFG                 0x001D
+#define CC120X_DEV_ADDR                 0x001E
+#define CC120X_SETTLING_CFG             0x001F
+#define CC120X_FS_CFG                   0x0020
+#define CC120X_WOR_CFG1                 0x0021
+#define CC120X_WOR_CFG0                 0x0022
+#define CC120X_WOR_EVENT0_MSB           0x0023
+#define CC120X_WOR_EVENT0_LSB           0x0024
+#define CC120X_RXDCM_TIME               0x0025
+#define CC120X_PKT_CFG2                 0x0026
+#define CC120X_PKT_CFG1                 0x0027
+#define CC120X_PKT_CFG0                 0x0028
+#define CC120X_RFEND_CFG1               0x0029
+#define CC120X_RFEND_CFG0               0x002A
+#define CC120X_PA_CFG1                  0x002B
+#define CC120X_PA_CFG0                  0x002C
+#define CC120X_ASK_CFG                  0x002D
+#define CC120X_PKT_LEN                  0x002E
+
+/* Extended Configuration Registers */
+#define CC120X_IF_MIX_CFG               0x2F00
+#define CC120X_FREQOFF_CFG              0x2F01
+#define CC120X_TOC_CFG                  0x2F02
+#define CC120X_MARC_SPARE               0x2F03
+#define CC120X_ECG_CFG                  0x2F04
+#define CC120X_MDMCFG2                  0x2F05
+#define CC120X_EXT_CTRL                 0x2F06
+#define CC120X_RCCAL_FINE               0x2F07
+#define CC120X_RCCAL_COARSE             0x2F08
+#define CC120X_RCCAL_OFFSET             0x2F09
+#define CC120X_FREQOFF1                 0x2F0A
+#define CC120X_FREQOFF0                 0x2F0B
+#define CC120X_FREQ2                    0x2F0C
+#define CC120X_FREQ1                    0x2F0D
+#define CC120X_FREQ0                    0x2F0E
+#define CC120X_IF_ADC2                  0x2F0F
+#define CC120X_IF_ADC1                  0x2F10
+#define CC120X_IF_ADC0                  0x2F11
+#define CC120X_FS_DIG1                  0x2F12
+#define CC120X_FS_DIG0                  0x2F13
+#define CC120X_FS_CAL3                  0x2F14
+#define CC120X_FS_CAL2                  0x2F15
+#define CC120X_FS_CAL1                  0x2F16
+#define CC120X_FS_CAL0                  0x2F17
+#define CC120X_FS_CHP                   0x2F18
+#define CC120X_FS_DIVTWO                0x2F19
+#define CC120X_FS_DSM1                  0x2F1A
+#define CC120X_FS_DSM0                  0x2F1B
+#define CC120X_FS_DVC1                  0x2F1C
+#define CC120X_FS_DVC0                  0x2F1D
+#define CC120X_FS_LBI                   0x2F1E
+#define CC120X_FS_PFD                   0x2F1F
+#define CC120X_FS_PRE                   0x2F20
+#define CC120X_FS_REG_DIV_CML           0x2F21
+#define CC120X_FS_SPARE                 0x2F22
+#define CC120X_FS_VCO4                  0x2F23
+#define CC120X_FS_VCO3                  0x2F24
+#define CC120X_FS_VCO2                  0x2F25
+#define CC120X_FS_VCO1                  0x2F26
+#define CC120X_FS_VCO0                  0x2F27
+#define CC120X_GBIAS6                   0x2F28
+#define CC120X_GBIAS5                   0x2F29
+#define CC120X_GBIAS4                   0x2F2A
+#define CC120X_GBIAS3                   0x2F2B
+#define CC120X_GBIAS2                   0x2F2C
+#define CC120X_GBIAS1                   0x2F2D
+#define CC120X_GBIAS0                   0x2F2E
+#define CC120X_IFAMP                    0x2F2F
+#define CC120X_LNA                      0x2F30
+#define CC120X_RXMIX                    0x2F31
+#define CC120X_XOSC5                    0x2F32
+#define CC120X_XOSC4                    0x2F33
+#define CC120X_XOSC3                    0x2F34
+#define CC120X_XOSC2                    0x2F35
+#define CC120X_XOSC1                    0x2F36
+#define CC120X_XOSC0                    0x2F37
+#define CC120X_ANALOG_SPARE             0x2F38
+#define CC120X_PA_CFG3                  0x2F39
+#define CC120X_IRQ0M                    0x2F3F
+#define CC120X_IRQ0F                    0x2F40
+
+/* Status Registers */
+#define CC120X_WOR_TIME1                0x2F64
+#define CC120X_WOR_TIME0                0x2F65
+#define CC120X_WOR_CAPTURE1             0x2F66
+#define CC120X_WOR_CAPTURE0             0x2F67
+#define CC120X_BIST                     0x2F68
+#define CC120X_DCFILTOFFSET_I1          0x2F69
+#define CC120X_DCFILTOFFSET_I0          0x2F6A
+#define CC120X_DCFILTOFFSET_Q1          0x2F6B
+#define CC120X_DCFILTOFFSET_Q0          0x2F6C
+#define CC120X_IQIE_I1                  0x2F6D
+#define CC120X_IQIE_I0                  0x2F6E
+#define CC120X_IQIE_Q1                  0x2F6F
+#define CC120X_IQIE_Q0                  0x2F70
+#define CC120X_RSSI1                    0x2F71
+#define CC120X_RSSI0                    0x2F72
+#define CC120X_MARCSTATE                0x2F73
+#define CC120X_LQI_VAL                  0x2F74
+#define CC120X_PQT_SYNC_ERR             0x2F75
+#define CC120X_DEM_STATUS               0x2F76
+#define CC120X_FREQOFF_EST1             0x2F77
+#define CC120X_FREQOFF_EST0             0x2F78
+#define CC120X_AGC_GAIN3                0x2F79
+#define CC120X_AGC_GAIN2                0x2F7A
+#define CC120X_AGC_GAIN1                0x2F7B
+#define CC120X_AGC_GAIN0                0x2F7C
+#define CC120X_CFM_RX_DATA_OUT         0x2F7D
+#define CC120X_CFM_TX_DATA_IN          0x2F7E
+#define CC120X_ASK_SOFT_RX_DATA         0x2F7F
+#define CC120X_RNDGEN                   0x2F80
+#define CC120X_MAGN2                    0x2F81
+#define CC120X_MAGN1                    0x2F82
+#define CC120X_MAGN0                    0x2F83
+#define CC120X_ANG1                     0x2F84
+#define CC120X_ANG0                     0x2F85
+#define CC120X_CHFILT_I2                0x2F86
+#define CC120X_CHFILT_I1                0x2F87
+#define CC120X_CHFILT_I0                0x2F88
+#define CC120X_CHFILT_Q2                0x2F89
+#define CC120X_CHFILT_Q1                0x2F8A
+#define CC120X_CHFILT_Q0                0x2F8B
+#define CC120X_GPIO_STATUS              0x2F8C
+#define CC120X_FSCAL_CTRL               0x2F8D
+#define CC120X_PHASE_ADJUST             0x2F8E
+#define CC120X_PARTNUMBER               0x2F8F
+#define CC120X_PARTVERSION              0x2F90
+#define CC120X_SERIAL_STATUS            0x2F91
+#define CC120X_MODEM_STATUS1            0x2F92
+#define CC120X_MODEM_STATUS0            0x2F93
+#define CC120X_MARC_STATUS1             0x2F94
+#define CC120X_MARC_STATUS0             0x2F95
+#define CC120X_PA_IFAMP_TEST            0x2F96
+#define CC120X_FSRF_TEST                0x2F97
+#define CC120X_PRE_TEST                 0x2F98
+#define CC120X_PRE_OVR                  0x2F99
+#define CC120X_ADC_TEST                 0x2F9A
+#define CC120X_DVC_TEST                 0x2F9B
+#define CC120X_ATEST                    0x2F9C
+#define CC120X_ATEST_LVDS               0x2F9D
+#define CC120X_ATEST_MODE               0x2F9E
+#define CC120X_XOSC_TEST1               0x2F9F
+#define CC120X_XOSC_TEST0               0x2FA0
+#define CC120X_AES                      0x2FA1
+#define CC120X_MDM_TEST                 0x2FA2
+
+#define CC120X_RXFIRST                  0x2FD2
+#define CC120X_TXFIRST                  0x2FD3
+#define CC120X_RXLAST                   0x2FD4
+#define CC120X_TXLAST                   0x2FD5
+#define CC120X_NUM_TXBYTES              0x2FD6  /* Number of bytes in TXFIFO */
+#define CC120X_NUM_RXBYTES              0x2FD7  /* Number of bytes in RXFIFO */
+#define CC120X_FIFO_NUM_TXBYTES         0x2FD8
+#define CC120X_FIFO_NUM_RXBYTES         0x2FD9
+#define CC120X_RXFIFO_PRE_BUF           0x2FDA
+
+/* DATA FIFO Access */
+#define CC120X_SINGLE_TXFIFO            0x003F     /*  TXFIFO  - Single accecss to Transmit FIFO */
+#define CC120X_BURST_TXFIFO             0x007F     /*  TXFIFO  - Burst accecss to Transmit FIFO  */
+#define CC120X_SINGLE_RXFIFO            0x00BF     /*  RXFIFO  - Single accecss to Receive FIFO  */
+#define CC120X_BURST_RXFIFO             0x00FF     /*  RXFIFO  - Busrrst ccecss to Receive FIFO  */
+
+/* AES Workspace */
+/* AES Key */
+#define CC120X_AES_KEY                  0x2FE0     /*  AES_KEY    - Address for AES key input  */
+#define CC120X_AES_KEY15	        0x2FE0
+#define CC120X_AES_KEY14	        0x2FE1
+#define CC120X_AES_KEY13	        0x2FE2
+#define CC120X_AES_KEY12	        0x2FE3
+#define CC120X_AES_KEY11	        0x2FE4
+#define CC120X_AES_KEY10	        0x2FE5
+#define CC120X_AES_KEY9	                0x2FE6
+#define CC120X_AES_KEY8	                0x2FE7
+#define CC120X_AES_KEY7	                0x2FE8
+#define CC120X_AES_KEY6	                0x2FE9
+#define CC120X_AES_KEY5	                0x2FE10
+#define CC120X_AES_KEY4	                0x2FE11
+#define CC120X_AES_KEY3	                0x2FE12
+#define CC120X_AES_KEY2	                0x2FE13
+#define CC120X_AES_KEY1	                0x2FE14
+#define CC120X_AES_KEY0	                0x2FE15
+
+/* AES Buffer */
+#define CC120X_AES_BUFFER               0x2FF0     /*  AES_BUFFER - Address for AES Buffer     */
+#define CC120X_AES_BUFFER15		0x2FF0
+#define CC120X_AES_BUFFER14		0x2FF1
+#define CC120X_AES_BUFFER13		0x2FF2
+#define CC120X_AES_BUFFER12		0x2FF3
+#define CC120X_AES_BUFFER11		0x2FF4
+#define CC120X_AES_BUFFER10		0x2FF5
+#define CC120X_AES_BUFFER9		0x2FF6
+#define CC120X_AES_BUFFER8		0x2FF7
+#define CC120X_AES_BUFFER7		0x2FF8
+#define CC120X_AES_BUFFER6		0x2FF9
+#define CC120X_AES_BUFFER5		0x2FF10
+#define CC120X_AES_BUFFER4		0x2FF11
+#define CC120X_AES_BUFFER3		0x2FF12
+#define CC120X_AES_BUFFER2		0x2FF13
+#define CC120X_AES_BUFFER1		0x2FF14
+#define CC120X_AES_BUFFER0		0x2FF15
+
+#define CC120X_LQI_CRC_OK_BM            0x80
+#define CC120X_LQI_EST_BM               0x7F
+
+/* Command strobe registers */
+#define CC120X_SRES                     0x30      /*  SRES    - Reset chip. */
+#define CC120X_SFSTXON                  0x31      /*  SFSTXON - Enable and calibrate frequency synthesizer. */
+#define CC120X_SXOFF                    0x32      /*  SXOFF   - Turn off crystal oscillator. */
+#define CC120X_SCAL                     0x33      /*  SCAL    - Calibrate frequency synthesizer and turn it off. */
+#define CC120X_SRX                      0x34      /*  SRX     - Enable RX. Perform calibration if enabled. */
+#define CC120X_STX                      0x35      /*  STX     - Enable TX. If in RX state, only enable TX if CCA passes. */
+#define CC120X_SIDLE                    0x36      /*  SIDLE   - Exit RX / TX, turn off frequency synthesizer. */
+#define CC120X_SAFC                     0x37      /*  AFC     - Automatic Frequency Correction */
+#define CC120X_SWOR                     0x38      /*  SWOR    - Start automatic RX polling sequence (Wake-on-Radio) */
+#define CC120X_SPWD                     0x39      /*  SPWD    - Enter power down mode when CSn goes high. */
+#define CC120X_SFRX                     0x3A      /*  SFRX    - Flush the RX FIFO buffer. */
+#define CC120X_SFTX                     0x3B      /*  SFTX    - Flush the TX FIFO buffer. */
+#define CC120X_SWORRST                  0x3C      /*  SWORRST - Reset real time clock. */
+#define CC120X_SNOP                     0x3D      /*  SNOP    - No operation. Returns status byte. */
+
+/* Chip states returned in status byte */
+#define CC120X_STATE_IDLE               0x00
+#define CC120X_STATE_RX                 0x10
+#define CC120X_STATE_TX                 0x20
+#define CC120X_STATE_FSTXON             0x30
+#define CC120X_STATE_CALIBRATE          0x40
+#define CC120X_STATE_SETTLING           0x50
+#define CC120X_STATE_RXFIFO_ERROR       0x60
+#define CC120X_STATE_TXFIFO_ERROR       0x70
+#define CC120X_RDYn_BIT					BIT(7)
+
+/* FIFO Address */
+#define CC120X_FIFO						0x3F
+
+/* Data Structures */
+typedef uint8_t rf_status_t;
+
+typedef struct {
+	uint16_t addr;
+	uint8_t data;
+} cc1200_reg_settings_t;
+
+/* Public Functions */
+
+// Configuration
+void cc1200_radio_init(const cc1200_reg_settings_t* rf_settings, uint8_t len);
+void cc1200_radio_frequency(uint32_t);
+void cc1200_radio_config(const cc1200_reg_settings_t* , uint8_t );
+rf_status_t cc1200_radio_reset(void);
+
+// Mode
+void cc1200_radio_tx(void);
+void cc1200_radio_rx(void);
+void cc1200_radio_idle(void);
+void cc1200_radio_sleep(void);
+
+
+// Data
+uint8_t cc1200_radio_read_RSSI(void);
+uint8_t cc1200_radio_read_CFM(void);
+void cc1200_radio_write_CFM(int8_t);
+
+#endif /* INC_CC1200_H_ */

+ 166 - 0
Core/Inc/cc1200_protocol.h

@@ -0,0 +1,166 @@
+/*
+ * cc1200_protocol.h
+ *
+ *  Created on: Feb 5, 2022
+ *      Author: curiousmuch
+ */
+
+#ifndef INC_CC1200_PROTOCOL_H_
+#define INC_CC1200_PROTOCOL_H_
+
+/*
+ * CC120X_protocol.h
+ *
+ *  Created on: Apr 13, 2019
+ *      Author: curiousmuch
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include "cc1200.h"
+
+//*********************************//
+// IMPORTANT GPIO SIGNALS
+// REG		DESCRIPTION
+// 0x1e		TX CLK
+// 0x1d		RX_CLK
+// 0x10		Carrier Sense Valid
+// 0x11		Carrier Sense
+//********************************//
+
+// Arrow - AX25 BELL202 AFSK Settings
+// -----------------------------------
+// Address Config = No address check
+// Bit Rate = 1.2
+// Carrier Frequency = 144.389954
+// Deviation = 4.997253
+// Device Address = 0
+// Manchester Enable = false
+// Modulation Format = 2-FSK
+// Packet Bit Length = 0
+// Packet Length = 255
+// Packet Length Mode = Variable
+// RX Filter BW = 14.880952
+// Symbol rate = 1.2
+// Whitening = false
+static const cc1200_reg_settings_t AX25_SETTINGS[]=
+{
+  {CC120X_IOCFG2,            0x09},		// Serial RX Data
+  {CC120X_IOCFG3,			 29}, 		// Serial Clock
+  {CC120X_IOCFG0,            0x09},		// Serial RX/TX (Don't Touch)
+  {CC120X_SYNC_CFG1,         0x00},		// Disable Sync Word
+  {CC120X_DEVIATION_M,		 0x68},		// Deviation: 2.5kHz
+  {CC120X_MODCFG_DEV_E,      0x00},
+  {CC120X_DCFILT_CFG,        0x5D},
+  {CC120X_PREAMBLE_CFG1,     0x00},
+  {CC120X_PREAMBLE_CFG0,     0x00},		// Preamble Disabled
+  {CC120X_IQIC,              0xCB},
+  {CC120X_CHAN_BW,           0xAA},//0x9C},
+  {CC120X_MDMCFG1,           0x06},
+  {CC120X_MDMCFG0,           0x45},
+  {CC120X_SYMBOL_RATE2,      0x3F},
+  {CC120X_SYMBOL_RATE1,      0x75},
+  {CC120X_SYMBOL_RATE0,      0x10},
+  {CC120X_AGC_REF,           0x30},
+  {CC120X_AGC_CS_THR,        0xEC},
+  {CC120X_AGC_CFG3,          0x11},
+  {CC120X_AGC_CFG1,          0x51},
+  {CC120X_AGC_CFG0,          0x87},
+  {CC120X_FIFO_CFG,          0x00},
+  {CC120X_FS_CFG,            0x1B},
+  {CC120X_PKT_CFG2,          0x03},
+  {CC120X_PKT_CFG1,          0x00},
+  {CC120X_PKT_CFG0,          0x28},
+  {CC120X_PA_CFG1,           0x3F},
+  {CC120X_PKT_LEN,           0xFF},
+  {CC120X_IF_MIX_CFG,        0x1C},
+  {CC120X_FREQOFF_CFG,       0x22},		// Frequency Offset Configuration, Enabled: 0x22, Disabled: 0x02
+  {CC120X_MDMCFG2,           0x0D}, 	// CFM, Enabled: 0x0D, Disabled 0x0C
+  {CC120X_FREQ2,             0x56},
+  {CC120X_FREQ1,             0xA2},
+  {CC120X_FREQ0,             0x4C},
+  {CC120X_IF_ADC1,           0xEE},
+  {CC120X_IF_ADC0,           0x10},
+  {CC120X_FS_DIG1,           0x07},
+  {CC120X_FS_DIG0,           0xAF},
+  {CC120X_FS_CAL1,           0x40},
+  {CC120X_FS_CAL0,           0x0E},
+  {CC120X_FS_DIVTWO,         0x03},
+  {CC120X_FS_DSM0,           0x33},
+  {CC120X_FS_DVC0,           0x17},
+  {CC120X_FS_PFD,            0x00},
+  {CC120X_FS_PRE,            0x6E},
+  {CC120X_FS_REG_DIV_CML,    0x1C},
+  {CC120X_FS_SPARE,          0xAC},
+  {CC120X_FS_VCO0,           0xB5},
+  {CC120X_XOSC5,             0x0E},
+  {CC120X_XOSC1,             0x03},
+  {CC120X_SERIAL_STATUS,     0x08},
+};
+
+// Arrow - FSK Narrowband Settings
+// Address Config = No address check
+// Bit Rate = 1.2
+// Carrier Frequency = 144.389954
+// Deviation = 3.986359
+// Device Address = 0
+// Manchester Enable = false
+// Modulation Format = 2-FSK
+// Packet Bit Length = 0
+// Packet Length = 255
+// Packet Length Mode = Variable
+// RX Filter BW = 10.964912
+// Symbol rate = 1.2
+// Whitening = true
+
+static const cc1200_reg_settings_t NARROWBAND_SETTINGS[]=
+{
+  {CC120X_IOCFG2,            0x06},
+  {CC120X_DEVIATION_M,       0xD1},
+  {CC120X_MODCFG_DEV_E,      0x00},
+  {CC120X_DCFILT_CFG,        0x5D},
+  {CC120X_PREAMBLE_CFG0,     0x8A},
+  {CC120X_IQIC,              0xCB},
+  {CC120X_CHAN_BW,           0xA6},
+  {CC120X_MDMCFG1,           0x40},
+  {CC120X_MDMCFG0,           0x05},
+  {CC120X_SYMBOL_RATE2,      0x3F},
+  {CC120X_SYMBOL_RATE1,      0x75},
+  {CC120X_SYMBOL_RATE0,      0x10},
+  {CC120X_AGC_REF,           0x20},
+  {CC120X_AGC_CS_THR,        0xEC},
+  {CC120X_AGC_CFG1,          0x51},
+  {CC120X_AGC_CFG0,          0x87},
+  {CC120X_FIFO_CFG,          0x00},
+  {CC120X_FS_CFG,            0x1B},
+  {CC120X_PKT_CFG2,          0x00},
+  {CC120X_PKT_CFG1,          0x43},
+  {CC120X_PKT_CFG0,          0x20},
+  {CC120X_PKT_LEN,           0xFF},
+  {CC120X_IF_MIX_CFG,        0x1C},
+  {CC120X_FREQOFF_CFG,       0x22},
+  {CC120X_MDMCFG2,           0x0C},
+  {CC120X_FREQ2,             0x56},
+  {CC120X_FREQ1,             0xA2},
+  {CC120X_FREQ0,             0x4C},
+  {CC120X_IF_ADC1,           0xEE},
+  {CC120X_IF_ADC0,           0x10},
+  {CC120X_FS_DIG1,           0x07},
+  {CC120X_FS_DIG0,           0xAF},
+  {CC120X_FS_CAL1,           0x40},
+  {CC120X_FS_CAL0,           0x0E},
+  {CC120X_FS_DIVTWO,         0x03},
+  {CC120X_FS_DSM0,           0x33},
+  {CC120X_FS_DVC0,           0x17},
+  {CC120X_FS_PFD,            0x00},
+  {CC120X_FS_PRE,            0x6E},
+  {CC120X_FS_REG_DIV_CML,    0x1C},
+  {CC120X_FS_SPARE,          0xAC},
+  {CC120X_FS_VCO0,           0xB5},
+  {CC120X_XOSC5,             0x0E},
+  {CC120X_XOSC1,             0x03},
+};
+
+
+
+#endif /* INC_CC1200_PROTOCOL_H_ */

+ 112 - 0
Core/Inc/main.h

@@ -0,0 +1,112 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7xx_hal.h"
+
+#include "stm32h7xx_ll_rcc.h"
+#include "stm32h7xx_ll_spi.h"
+#include "stm32h7xx_ll_bus.h"
+#include "stm32h7xx_ll_cortex.h"
+#include "stm32h7xx_ll_system.h"
+#include "stm32h7xx_ll_utils.h"
+#include "stm32h7xx_ll_pwr.h"
+#include "stm32h7xx_ll_gpio.h"
+#include "stm32h7xx_ll_dma.h"
+
+#include "stm32h7xx_ll_exti.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define B1_Pin GPIO_PIN_13
+#define B1_GPIO_Port GPIOC
+#define LED_GREEN_Pin GPIO_PIN_0
+#define LED_GREEN_GPIO_Port GPIOB
+#define CC1200_RESET_Pin GPIO_PIN_12
+#define CC1200_RESET_GPIO_Port GPIOB
+#define LED_RED_Pin GPIO_PIN_14
+#define LED_RED_GPIO_Port GPIOB
+#define CC1200_TCXO_ENABLE_Pin GPIO_PIN_15
+#define CC1200_TCXO_ENABLE_GPIO_Port GPIOB
+#define STLK_VCP_RX_Pin GPIO_PIN_8
+#define STLK_VCP_RX_GPIO_Port GPIOD
+#define STLK_VCP_TX_Pin GPIO_PIN_9
+#define STLK_VCP_TX_GPIO_Port GPIOD
+#define USB_FS_PWR_EN_Pin GPIO_PIN_10
+#define USB_FS_PWR_EN_GPIO_Port GPIOD
+#define USB_FS_OVCR_Pin GPIO_PIN_7
+#define USB_FS_OVCR_GPIO_Port GPIOG
+#define CC1200_CS_Pin GPIO_PIN_6
+#define CC1200_CS_GPIO_Port GPIOC
+#define USB_FS_VBUS_Pin GPIO_PIN_9
+#define USB_FS_VBUS_GPIO_Port GPIOA
+#define USB_FS_ID_Pin GPIO_PIN_10
+#define USB_FS_ID_GPIO_Port GPIOA
+#define SWDIO_Pin GPIO_PIN_13
+#define SWDIO_GPIO_Port GPIOA
+#define SWCLK_Pin GPIO_PIN_14
+#define SWCLK_GPIO_Port GPIOA
+#define SWO_Pin GPIO_PIN_3
+#define SWO_GPIO_Port GPIOB
+#define LED_YELLOW_Pin GPIO_PIN_1
+#define LED_YELLOW_GPIO_Port GPIOE
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */

+ 53 - 0
Core/Inc/stm32_assert.h

@@ -0,0 +1,53 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32_assert.h
+  * @brief   STM32 assert file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32_ASSERT_H
+#define __STM32_ASSERT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Includes ------------------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32_ASSERT_H */
+

+ 510 - 0
Core/Inc/stm32h7xx_hal_conf.h

@@ -0,0 +1,510 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7xx_HAL_CONF_H
+#define STM32H7xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+
+  /* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_FDCAN_MODULE_ENABLED   */
+/* #define HAL_FMAC_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_COMP_MODULE_ENABLED   */
+/* #define HAL_CORDIC_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DAC_MODULE_ENABLED   */
+/* #define HAL_DCMI_MODULE_ENABLED   */
+/* #define HAL_DMA2D_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+/* #define HAL_OTFDEC_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_HRTIM_MODULE_ENABLED   */
+/* #define HAL_HSEM_MODULE_ENABLED   */
+/* #define HAL_GFXMMU_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_OPAMP_MODULE_ENABLED   */
+/* #define HAL_OSPI_MODULE_ENABLED   */
+/* #define HAL_OSPI_MODULE_ENABLED   */
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+/* #define HAL_LTDC_MODULE_ENABLED   */
+/* #define HAL_QSPI_MODULE_ENABLED   */
+/* #define HAL_RAMECC_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SAI_MODULE_ENABLED   */
+/* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_MMC_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+/* #define HAL_SWPMI_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+/* #define HAL_UART_MODULE_ENABLED   */
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_PCD_MODULE_ENABLED
+/* #define HAL_HCD_MODULE_ENABLED   */
+/* #define HAL_DFSDM_MODULE_ENABLED   */
+/* #define HAL_DSI_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_MDIOS_MODULE_ENABLED   */
+/* #define HAL_PSSI_MODULE_ENABLED   */
+/* #define HAL_DTS_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_MDMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_HSEM_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    (8000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal  oscillator (CSI) default value.
+  *        This value is the default CSI value after Reset.
+  */
+#if !defined  (CSI_VALUE)
+  #define CSI_VALUE    (4000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* CSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (64000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+  #define LSE_VALUE    (32768UL) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+#if !defined  (LSI_VALUE)
+  #define LSI_VALUE  (32000UL)              /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                              The real value may vary depending on the variations
+                                              in voltage and temperature.*/
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    12288000UL /*!< Value of the External clock in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (0UL) /*!< tick interrupt priority */
+#define  USE_RTOS                     0
+#define  USE_SD_TRANSCEIVER           0U               /*!< use uSD Transceiver */
+#define  USE_SPI_CRC	              0U               /*!< use CRC in SPI */
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS     0U /* ADC register callback disabled     */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS     0U /* CEC register callback disabled     */
+#define  USE_HAL_COMP_REGISTER_CALLBACKS    0U /* COMP register callback disabled    */
+#define  USE_HAL_CORDIC_REGISTER_CALLBACKS  0U /* CORDIC register callback disabled  */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS    0U /* CRYP register callback disabled    */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS     0U /* DAC register callback disabled     */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS    0U /* DCMI register callback disabled    */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS   0U /* DFSDM register callback disabled   */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS   0U /* DMA2D register callback disabled   */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS     0U /* DSI register callback disabled     */
+#define  USE_HAL_DTS_REGISTER_CALLBACKS     0U /* DTS register callback disabled     */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS     0U /* ETH register callback disabled     */
+#define  USE_HAL_FDCAN_REGISTER_CALLBACKS   0U /* FDCAN register callback disabled   */
+#define  USE_HAL_FMAC_REGISTER_CALLBACKS    0U /* FMAC register callback disabled  */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS    0U /* NAND register callback disabled    */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS     0U /* NOR register callback disabled     */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS   0U /* SDRAM register callback disabled   */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS    0U /* SRAM register callback disabled    */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS    0U /* HASH register callback disabled    */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS     0U /* HCD register callback disabled     */
+#define  USE_HAL_GFXMMU_REGISTER_CALLBACKS  0U /* GFXMMU register callback disabled  */
+#define  USE_HAL_HRTIM_REGISTER_CALLBACKS   0U /* HRTIM register callback disabled   */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS     0U /* I2C register callback disabled     */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS     0U /* I2S register callback disabled     */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS    0U /* IRDA register callback disabled    */
+#define  USE_HAL_JPEG_REGISTER_CALLBACKS    0U /* JPEG register callback disabled    */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS   0U /* LPTIM register callback disabled   */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS    0U /* LTDC register callback disabled    */
+#define  USE_HAL_MDIOS_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS     0U /* MMC register callback disabled     */
+#define  USE_HAL_OPAMP_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
+#define  USE_HAL_OSPI_REGISTER_CALLBACKS    0U /* OSPI register callback disabled    */
+#define  USE_HAL_OTFDEC_REGISTER_CALLBACKS  0U /* OTFDEC register callback disabled  */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS     0U /* PCD register callback disabled     */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS    0U /* QSPI register callback disabled    */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS     0U /* RNG register callback disabled     */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS     0U /* RTC register callback disabled     */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS     0U /* SAI register callback disabled     */
+#define  USE_HAL_SD_REGISTER_CALLBACKS      0U /* SD register callback disabled      */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS   0U /* SMBUS register callback disabled   */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS     0U /* SPI register callback disabled     */
+#define  USE_HAL_SWPMI_REGISTER_CALLBACKS   0U /* SWPMI register callback disabled   */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS     0U /* TIM register callback disabled     */
+#define  USE_HAL_UART_REGISTER_CALLBACKS    0U /* UART register callback disabled    */
+#define  USE_HAL_USART_REGISTER_CALLBACKS   0U /* USART register callback disabled   */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS    0U /* WWDG register callback disabled    */
+
+/* ########################### Ethernet Configuration ######################### */
+#define ETH_TX_DESC_CNT         4  /* number of Ethernet Tx DMA descriptors */
+#define ETH_RX_DESC_CNT         4  /* number of Ethernet Rx DMA descriptors */
+
+#define ETH_MAC_ADDR0    (0x02UL)
+#define ETH_MAC_ADDR1    (0x00UL)
+#define ETH_MAC_ADDR2    (0x00UL)
+#define ETH_MAC_ADDR3    (0x00UL)
+#define ETH_MAC_ADDR4    (0x00UL)
+#define ETH_MAC_ADDR5    (0x00UL)
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32h7xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32h7xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32h7xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_MDMA_MODULE_ENABLED
+ #include "stm32h7xx_hal_mdma.h"
+#endif /* HAL_MDMA_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+  #include "stm32h7xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32h7xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32h7xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+  #include "stm32h7xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+  #include "stm32h7xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+ #include "stm32h7xx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32h7xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32h7xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32h7xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32h7xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32h7xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32h7xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+  #include "stm32h7xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32h7xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32h7xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32h7xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32h7xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32h7xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+  #include "stm32h7xx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+  #include "stm32h7xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+  #include "stm32h7xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+  #include "stm32h7xx_hal_hsem.h"
+#endif /* HAL_HSEM_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32h7xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32h7xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32h7xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32h7xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32h7xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32h7xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+ #include "stm32h7xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+ #include "stm32h7xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32h7xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32h7xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+#include "stm32h7xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32h7xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_OSPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_ospi.h"
+#endif /* HAL_OSPI_MODULE_ENABLED */
+
+#ifdef HAL_OTFDEC_MODULE_ENABLED
+#include "stm32h7xx_hal_otfdec.h"
+#endif /* HAL_OTFDEC_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+ #include "stm32h7xx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32h7xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+ #include "stm32h7xx_hal_ramecc.h"
+#endif /* HAL_RAMECC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32h7xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32h7xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32h7xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32h7xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+ #include "stm32h7xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32h7xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SWPMI_MODULE_ENABLED
+ #include "stm32h7xx_hal_swpmi.h"
+#endif /* HAL_SWPMI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32h7xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32h7xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32h7xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32h7xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32h7xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32h7xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32h7xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32h7xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32h7xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H7xx_HAL_CONF_H */

+ 68 - 0
Core/Inc/stm32h7xx_it.h

@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32H7xx_IT_H
+#define __STM32H7xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void TIM3_IRQHandler(void);
+void OTG_HS_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32H7xx_IT_H */

+ 371 - 0
Core/Src/cc1200.c

@@ -0,0 +1,371 @@
+/*
+ * cc1200.c
+ *
+ *  Created on: Feb 5, 2022
+ *      Author: curiousmuch
+ */
+
+
+/*
+ * Project: Arrow
+ * Author: 	curiousmuch
+ */
+#include <stdio.h>
+#include <math.h>
+#include "main.h"
+#include "cc1200.h"
+#include "cc1200_protocol.h"
+
+#define BIT(n) (0x1U << (n))
+
+/* SPI Constants */
+#define CC1200_WRITE_BIT 	0b00000000
+#define CC1200_READ_BIT 	0b10000000
+#define CC1200_BURST_BIT 	0b01000000
+
+
+void SPI1_TransmitBytes(uint8_t *p_buf, uint8_t len)
+{
+	  LL_SPI_SetTransferSize(SPI1, len);
+
+	  LL_SPI_Enable(SPI1);
+	  LL_SPI_StartMasterTransfer(SPI1);
+
+
+	  switch(len)
+	  {
+	  case 1:
+		  LL_SPI_TransmitData8(SPI1, *p_buf);
+		  break;
+	  case 2:
+		  LL_SPI_TransmitData16(SPI1, *(uint16_t *)p_buf);
+		  break;
+	  case 3:
+		  LL_SPI_TransmitData32(SPI1, *(uint32_t *)p_buf);
+		  break;
+	  default:
+		  assert(0);
+	  }
+
+	  // Wait until the transmission is complete
+	  while( LL_SPI_IsActiveFlag_EOT(SPI1) == 0);
+
+	  SPI1->IFCR = UINT32_MAX;
+
+	  LL_SPI_Disable(SPI1);
+}
+
+uint8_t SPI1_ReceiveByte(void)
+{
+	  uint8_t rxByte;
+	  LL_SPI_SetTransferSize(SPI1, 1);
+
+	  LL_SPI_Enable(SPI1);
+	  LL_SPI_StartMasterTransfer(SPI1);
+
+	  LL_SPI_TransmitData8(SPI1, 0);
+
+	  while (LL_SPI_IsActiveFlag_RXP(SPI1) == 0);
+
+	  rxByte = LL_SPI_ReceiveData8(SPI1);
+
+	  // Wait until the transmission is complete
+	  while( LL_SPI_IsActiveFlag_EOT(SPI1) == 0);
+
+	  SPI1->IFCR = UINT32_MAX;
+
+	  LL_SPI_Disable(SPI1);
+
+	  return rxByte;
+}
+
+uint8_t SPI1_TransmitReceive(uint8_t *p_buf, uint8_t len)
+{
+	SPI1_TransmitBytes(p_buf, len);
+	return SPI1_ReceiveByte();
+}
+
+// TODO: Fix to use HAL.
+static void cc1200_spi_write_byte(uint16_t addr, uint8_t data)
+{
+	uint8_t txBuf[3];
+
+
+
+	// set the data field
+
+	HAL_GPIO_WritePin(CC1200_CS_GPIO_Port, CC1200_CS_Pin, 0);
+
+	if ((addr & 0xFF00) != 0) // send data with extended address in command field
+	{
+		txBuf[0] = ((uint8_t *)&addr)[1];
+		txBuf[1] = ((uint8_t *)&addr)[0];
+		txBuf[0] |= CC1200_WRITE_BIT;
+		txBuf[2] = data;
+
+		SPI1_TransmitBytes(txBuf, 3);
+	}
+	else
+	{
+		// correctly configure the addr field.
+		txBuf[0] = (uint8_t)addr | CC1200_WRITE_BIT;
+		txBuf[1] = data;
+		SPI1_TransmitBytes(txBuf, 2);
+	}
+
+	HAL_GPIO_WritePin(CC1200_CS_GPIO_Port, CC1200_CS_Pin, 1);
+
+}
+
+//static void cc1200_spi_write_bytes(uint16_t addr, uint8_t* data, uint8_t len)
+//{
+//	esp_err_t ret;
+//	spi_transaction_t tx_trans =
+//	{
+//		.cmd = (CC1200_WRITE_BIT | CC1200_BURST_BIT),
+//		.addr = addr,
+//		.length = 8*len,
+//		.tx_buffer = data
+//	};
+//	if ((addr & 0xFF00) != 0) // send data with extended address in command field
+//	{
+//		tx_trans.flags |= (SPI_TRANS_VARIABLE_CMD | SPI_TRANS_VARIABLE_ADDR);
+//		spi_transaction_ext_t tx_trans_ext =
+//		{
+//				.base = tx_trans,
+//				.command_bits = 2,
+//				.address_bits = 14
+//		};
+//		ret = spi_device_polling_transmit(spi, (spi_transaction_t*)&tx_trans_ext);
+//	}
+//	else
+//	{
+//		ret = spi_device_polling_transmit(spi, &tx_trans);
+//	}
+//	ESP_ERROR_CHECK(ret);
+//}
+
+// TODO: Fix to use HAL.
+static void cc1200_spi_read_byte(uint16_t addr, uint8_t* data)
+{
+
+	uint8_t rxBuf[3];
+	uint8_t txBuf[3];
+
+	// correctly configure the addr field.
+	txBuf[0] = (uint8_t)addr | CC1200_READ_BIT;
+
+	HAL_GPIO_WritePin(CC1200_CS_GPIO_Port, CC1200_CS_Pin, 0);
+
+
+	if ((addr & 0xFF00) != 0) // read data with extended address in command field
+	{
+		txBuf[0] = ((uint8_t *)&addr)[1];
+		txBuf[1] = ((uint8_t *)&addr)[0];
+		txBuf[0] |= CC1200_READ_BIT;
+
+		*data = SPI1_TransmitReceive(txBuf, 2);
+	}
+	else
+	{
+		*data = SPI1_TransmitReceive(txBuf, 1);
+	}
+
+	HAL_GPIO_WritePin(CC1200_CS_GPIO_Port, CC1200_CS_Pin, 1);
+
+}
+
+//static void cc1200_spi_read_bytes(uint16_t addr, uint8_t* data, uint8_t len)
+//{
+//	esp_err_t ret;
+//	spi_transaction_t rx_trans =
+//	{
+//		.cmd = (CC1200_READ_BIT | CC1200_BURST_BIT),
+//		.addr = addr,
+//		.length = 8*len,
+//		.rxlength = 8*len,
+//		.rx_buffer = data
+//	};
+//	if ((addr & 0xFF00) != 0) // read data with extended address in command field
+//	{
+//		rx_trans.flags |= (SPI_TRANS_VARIABLE_CMD | SPI_TRANS_VARIABLE_ADDR);
+//		spi_transaction_ext_t rx_trans_ext =
+//		{
+//				.base = rx_trans,
+//				.command_bits = 2,
+//				.address_bits = 14
+//		};
+//		ret = spi_device_polling_transmit(spi, (spi_transaction_t*)&rx_trans_ext);
+//	}
+//	else
+//	{
+//		ret = spi_device_polling_transmit(spi, &rx_trans);
+//	}
+//	ESP_ERROR_CHECK(ret);
+//}
+
+// TODO: Fix to use HAL.
+rf_status_t cc1200_spi_strobe(uint8_t cmd)
+{
+	uint8_t txBuf[2];
+	txBuf[0] = cmd;
+
+	HAL_GPIO_WritePin(CC1200_CS_GPIO_Port, CC1200_CS_Pin, 0);
+
+	uint8_t rxByte;
+	LL_SPI_SetTransferSize(SPI1, 1);
+
+	LL_SPI_Enable(SPI1);
+	LL_SPI_StartMasterTransfer(SPI1);
+
+	LL_SPI_TransmitData8(SPI1, cmd);
+
+	while (LL_SPI_IsActiveFlag_RXP(SPI1) == 0);
+
+	rxByte = LL_SPI_ReceiveData8(SPI1);
+
+	// Wait until the transmission is complete
+	while( LL_SPI_IsActiveFlag_EOT(SPI1) == 0);
+
+	SPI1->IFCR = UINT32_MAX;
+
+	LL_SPI_Disable(SPI1);
+
+	HAL_GPIO_WritePin(CC1200_CS_GPIO_Port, CC1200_CS_Pin, 1);
+
+	return rxByte & 0xF0;
+}
+
+// writes array or register value pairs from smart RF studio to CC1200
+// w/o reseting
+void cc1200_radio_config(const cc1200_reg_settings_t* rf_settings, uint8_t len)
+{
+	uint8_t i;
+	for (i=0;i<len;i++)
+	{
+		cc1200_spi_write_byte(rf_settings[i].addr, rf_settings[i].data);
+	}
+}
+
+/* CC1200 Driver Public Functions */
+
+uint8_t cc1200_radio_read_RSSI(void)
+{
+	uint8_t data = 0;
+	cc1200_spi_read_byte(CC120X_RSSI1, &data);
+	return data;
+}
+
+uint8_t cc1200_radio_read_CFM(void)
+{
+	uint8_t data = 0;
+	cc1200_spi_read_byte(CC120X_CFM_RX_DATA_OUT, &data);
+	return data;
+}
+
+void cc1200_radio_write_CFM(int8_t data)
+{
+	cc1200_spi_write_byte(CC120X_CFM_TX_DATA_IN, data);
+}
+
+rf_status_t cc1200_radio_reset(void)
+{
+	rf_status_t status;
+	uint8_t retry_count = 0;
+
+	cc1200_spi_strobe(CC120X_SRES);					// soft reset the chip
+	status = cc1200_spi_strobe(CC120X_SNOP);		// get chip status
+
+	HAL_Delay(20);
+
+	while((CC120X_RDYn_BIT & (status & 0x80)))		// if chip isn't ready, wait 10ms
+	{
+		HAL_Delay(10);
+		if (retry_count > 3)
+		{
+			break;
+		}
+		status = cc1200_spi_strobe(CC120X_SNOP);
+		retry_count++;
+	}
+
+	return status;
+}
+
+#define CC1200_LO_DIVIDER	24 			// 136.7 - 160 MHz Band
+#define CC1200_XOSC 		40000000	// 40MHz
+
+void cc1200_radio_frequency(uint32_t freq)
+{
+	// f_RF = f_VCO / LO Divider
+	// f_VCO = FREQ / 2^16 * f_XOSX + FREQOFF / 2^18 * F_XOSC
+
+	double temp_freq;
+
+	// calculate FREQ0, FREQ, FREQ2 registers
+	temp_freq = ((double) freq * 65536 * CC1200_LO_DIVIDER) / CC1200_XOSC;
+	freq = (uint32_t)temp_freq;
+
+	cc1200_spi_write_byte(CC120X_FREQ0, ((uint8_t *)&freq)[0]);
+	cc1200_spi_write_byte(CC120X_FREQ1, ((uint8_t *)&freq)[1]);
+	cc1200_spi_write_byte(CC120X_FREQ2, ((uint8_t *)&freq)[2]);
+	return ;
+}
+
+void cc1200_radio_sleep(void)
+{
+	// TODO: Write CC1200 sleep function
+	return;
+}
+
+void cc1200_radio_power(uint8_t txPower)
+{
+	// TODO: Write function to set CC1200 power
+	return;
+}
+
+void cc1200_radio_idle(void)
+{
+	// TODO: Create exception for failure condition
+	while (cc1200_spi_strobe(CC120X_SIDLE) != CC120X_STATE_IDLE);
+}
+
+void cc1200_radio_tx(void)
+{
+	// TODO: Create exception for failure condition
+	while (cc1200_spi_strobe(CC120X_STX) != CC120X_STATE_TX);
+}
+
+void cc1200_radio_rx(void)
+{
+	// TODO: Create exception for failure condition
+
+	while (cc1200_spi_strobe(CC120X_SRX) != CC120X_STATE_RX);
+}
+
+// TODO: Fix to use HAL.
+void cc1200_radio_init(const cc1200_reg_settings_t* rf_settings, uint8_t len)
+{
+
+	//cc1200_gpio_init();
+	//cc1200_spi_init();
+
+	cc1200_radio_reset();	//gpio_set_level(CC1200_RESET, 1);
+
+
+	uint8_t i;
+
+	for (i=0;i<len;i++)
+	{
+		cc1200_spi_write_byte(rf_settings[i].addr, rf_settings[i].data);
+	}
+	while(cc1200_spi_strobe(CC120X_SIDLE) != CC120X_STATE_IDLE);
+
+}
+
+
+
+
+
+
+

+ 542 - 0
Core/Src/main.c

@@ -0,0 +1,542 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "usb_device.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+//#include "cc1200.h"
+//#include "cc1200_protocol.h"
+#include "usbd_cdc_if.h"
+#include "cc1200.h"
+#include "cc1200_protocol.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+TIM_HandleTypeDef htim3;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_SPI1_Init(void);
+static void MX_TIM3_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+static void SPI1_TransmitBytes(uint8_t *p_buf, uint8_t len)
+{
+	  LL_SPI_SetTransferSize(SPI1, len);
+
+	  LL_SPI_Enable(SPI1);
+	  LL_SPI_StartMasterTransfer(SPI1);
+
+
+	  switch(len)
+	  {
+	  case 1:
+		  LL_SPI_TransmitData8(SPI1, *p_buf);
+		  break;
+	  case 2:
+		  LL_SPI_TransmitData16(SPI1, *(uint16_t *)p_buf);
+		  break;
+	  default:
+		  assert(0);
+	  }
+
+	  // Wait until the transmission is complete
+	  while( LL_SPI_IsActiveFlag_EOT(SPI1) == 0);
+
+	  SPI1->IFCR = UINT32_MAX;
+
+	  LL_SPI_Disable(SPI1);
+}
+
+static uint8_t SPI1_ReceiveByte(void)
+{
+	  LL_SPI_SetTransferSize(SPI1, 1);
+
+	  LL_SPI_Enable(SPI1);
+	  LL_SPI_StartMasterTransfer(SPI1);
+
+	  LL_SPI_TransmitData8(SPI1, 0);
+
+	  // Wait until the transmission is complete
+	  while( LL_SPI_IsActiveFlag_EOT(SPI1) == 0);
+
+	  SPI1->IFCR = UINT32_MAX;
+
+	  LL_SPI_Disable(SPI1);
+
+	  return LL_SPI_ReceiveData8(SPI1);
+}
+
+static uint8_t txBuffer;
+
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef * htim)
+{
+
+	txBuffer = cc1200_radio_read_CFM();
+	//cc1200_radio_write_CFM(0);
+	CDC_Transmit_HS(&txBuffer, 1);
+
+	// Toggle LED as heart beat.
+	static uint32_t toggleCount = 0;
+	if (toggleCount++ == 40000)
+	{
+		HAL_GPIO_TogglePin(LED_GREEN_GPIO_Port, LED_GREEN_Pin);
+		toggleCount = 0;
+	}
+}
+
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* Enable I-Cache---------------------------------------------------------*/
+  SCB_EnableICache();
+
+  /* Enable D-Cache---------------------------------------------------------*/
+  SCB_EnableDCache();
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_SPI1_Init();
+  MX_TIM3_Init();
+  MX_USB_DEVICE_Init();
+  /* USER CODE BEGIN 2 */
+
+  HAL_StatusTypeDef errCode;
+
+  // Manually reset the CC1200.
+  HAL_GPIO_WritePin(CC1200_RESET_GPIO_Port, CC1200_RESET_Pin, 0);
+  HAL_Delay(50);
+  HAL_GPIO_WritePin(CC1200_RESET_GPIO_Port, CC1200_RESET_Pin, 1);
+  HAL_Delay(50);
+
+  // Setup up the 5million registers.
+  cc1200_radio_init((cc1200_reg_settings_t *)AX25_SETTINGS, sizeof(AX25_SETTINGS)/sizeof(cc1200_reg_settings_t));
+
+  // Set frequency
+  cc1200_radio_frequency(144390000);
+
+  // Enable TX/RX
+  cc1200_radio_rx();
+
+
+  // Start Timer for SPI
+  errCode = HAL_TIM_Base_Start_IT(&htim3);
+
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Supply configuration update enable
+  */
+  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
+
+  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 4;
+  RCC_OscInitStruct.PLL.PLLN = 275;
+  RCC_OscInitStruct.PLL.PLLP = 1;
+  RCC_OscInitStruct.PLL.PLLQ = 4;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_1;
+  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+  RCC_OscInitStruct.PLL.PLLFRACN = 0;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
+                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief SPI1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SPI1_Init(void)
+{
+
+  /* USER CODE BEGIN SPI1_Init 0 */
+
+  /* USER CODE END SPI1_Init 0 */
+
+  LL_SPI_InitTypeDef SPI_InitStruct = {0};
+
+  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+  /** Initializes the peripherals clock
+  */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI1;
+  PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /* Peripheral clock enable */
+  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);
+
+  LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOA);
+  LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOD);
+  /**SPI1 GPIO Configuration
+  PA5   ------> SPI1_SCK
+  PA6   ------> SPI1_MISO
+  PD7   ------> SPI1_MOSI
+  */
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_5|LL_GPIO_PIN_6;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+  GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+  GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+  LL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN SPI1_Init 1 */
+
+  /* USER CODE END SPI1_Init 1 */
+  /* SPI1 parameter configuration*/
+  SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
+  SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+  SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT;
+  SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
+  SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+  SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+  SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV32;
+  SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+  SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+  SPI_InitStruct.CRCPoly = 0x0;
+  LL_SPI_Init(SPI1, &SPI_InitStruct);
+  LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA);
+  LL_SPI_EnableNSSPulseMgt(SPI1);
+  /* USER CODE BEGIN SPI1_Init 2 */
+
+  /* USER CODE END SPI1_Init 2 */
+
+}
+
+/**
+  * @brief TIM3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM3_Init(void)
+{
+
+  /* USER CODE BEGIN TIM3_Init 0 */
+
+  /* USER CODE END TIM3_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM3_Init 1 */
+
+  /* USER CODE END TIM3_Init 1 */
+  htim3.Instance = TIM3;
+  htim3.Init.Prescaler = 0;
+  htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim3.Init.Period = 6875;
+  htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
+  if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM3_Init 2 */
+
+  /* USER CODE END TIM3_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, LED_GREEN_Pin|CC1200_RESET_Pin|LED_RED_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(CC1200_TCXO_ENABLE_GPIO_Port, CC1200_TCXO_ENABLE_Pin, GPIO_PIN_SET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(USB_FS_PWR_EN_GPIO_Port, USB_FS_PWR_EN_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(CC1200_CS_GPIO_Port, CC1200_CS_Pin, GPIO_PIN_SET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(LED_YELLOW_GPIO_Port, LED_YELLOW_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin : B1_Pin */
+  GPIO_InitStruct.Pin = B1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PC1 PC4 PC5 */
+  GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PA1 PA2 PA7 */
+  GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : LED_GREEN_Pin LED_RED_Pin */
+  GPIO_InitStruct.Pin = LED_GREEN_Pin|LED_RED_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : CC1200_RESET_Pin CC1200_TCXO_ENABLE_Pin */
+  GPIO_InitStruct.Pin = CC1200_RESET_Pin|CC1200_TCXO_ENABLE_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : PB13 */
+  GPIO_InitStruct.Pin = GPIO_PIN_13;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : STLK_VCP_RX_Pin STLK_VCP_TX_Pin */
+  GPIO_InitStruct.Pin = STLK_VCP_RX_Pin|STLK_VCP_TX_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : USB_FS_PWR_EN_Pin */
+  GPIO_InitStruct.Pin = USB_FS_PWR_EN_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(USB_FS_PWR_EN_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : USB_FS_OVCR_Pin */
+  GPIO_InitStruct.Pin = USB_FS_OVCR_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(USB_FS_OVCR_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : CC1200_CS_Pin */
+  GPIO_InitStruct.Pin = CC1200_CS_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  HAL_GPIO_Init(CC1200_CS_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PG11 PG13 */
+  GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_13;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : LED_YELLOW_Pin */
+  GPIO_InitStruct.Pin = LED_YELLOW_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(LED_YELLOW_GPIO_Port, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+

+ 131 - 0
Core/Src/stm32h7xx_hal_msp.c

@@ -0,0 +1,131 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32h7xx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief TIM_Base MSP Initialization
+* This function configures the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspInit 0 */
+
+  /* USER CODE END TIM3_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM3_CLK_ENABLE();
+    /* TIM3 interrupt Init */
+    HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(TIM3_IRQn);
+  /* USER CODE BEGIN TIM3_MspInit 1 */
+
+  /* USER CODE END TIM3_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief TIM_Base MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param htim_base: TIM_Base handle pointer
+* @retval None
+*/
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
+{
+  if(htim_base->Instance==TIM3)
+  {
+  /* USER CODE BEGIN TIM3_MspDeInit 0 */
+
+  /* USER CODE END TIM3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_TIM3_CLK_DISABLE();
+
+    /* TIM3 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(TIM3_IRQn);
+  /* USER CODE BEGIN TIM3_MspDeInit 1 */
+
+  /* USER CODE END TIM3_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+

+ 233 - 0
Core/Src/stm32h7xx_it.c

@@ -0,0 +1,233 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32h7xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern PCD_HandleTypeDef hpcd_USB_OTG_HS;
+extern TIM_HandleTypeDef htim3;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32H7xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32h7xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM3 global interrupt.
+  */
+void TIM3_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM3_IRQn 0 */
+
+  /* USER CODE END TIM3_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim3);
+  /* USER CODE BEGIN TIM3_IRQn 1 */
+
+  /* USER CODE END TIM3_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USB On The Go HS global interrupt.
+  */
+void OTG_HS_IRQHandler(void)
+{
+  /* USER CODE BEGIN OTG_HS_IRQn 0 */
+
+  /* USER CODE END OTG_HS_IRQn 0 */
+  HAL_PCD_IRQHandler(&hpcd_USB_OTG_HS);
+  /* USER CODE BEGIN OTG_HS_IRQn 1 */
+
+  /* USER CODE END OTG_HS_IRQn 1 */
+}
+